Trends in design of massively parallel coprocessors implemented in digital ASICs

IEEE International Conference on Neural Networks - Conference Proceedings

Volumn 4, Issue , 2004, Pages 3131-3135

  Földesy, Péter ^a  

^a INSTITUTE OF EXPERIMENTAL MEDICINE   (Hungary)

Author keywords

[No Author keywords available]

Indexed keywords

COPROCESSORS; CUSTOM DESIGN; END USERS; MULTI CHIP SYSTEM;

COMPUTER SIMULATION; COMPUTER SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE PROCESSING; INTEGRATED CIRCUITS; LOGIC DESIGN; MICROPROCESSOR CHIPS; SENSORS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 10944232699     PISSN: 10987576     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IJCNN.2004.1381174     Document Type: Conference Paper

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