Microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 11, 1999, Pages 1608-1618

  Suzuoki, Masakazu ^a   Kutaragi, Ken ^a   Hiroi, Toshiyuki ^a   Magoshi, Hidetaka ^a   Okamoto, Shin'ichi ^a   Oka, Masaaki ^a   Ohba, Akio ^a   Yamamoto, Yasuyuki ^a   Furuhashi, Makoto ^a,c   Tanaka, Masayoshi ^a   Yutaka, Teiji ^a   Okada, Toyoshi ^a   Nagamatsu, Masato ^b   Urakawa, Yukihiro ^b   Funyu, Masami ^b   Kunimatsu, Atsushi ^b   Goto, Harutaka ^b   Hashimoto, Kazuhiro ^b   Ide, Nobuhiro ^b   Murakami, Hiroaki ^b   Ohtaguro, Yukio ^b   Aono, Akira ^b   more..

^a Sony Computer Entertainment Inc   (United States)

^b TOSHIBA CORPORATION   (Japan)

^c SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER GRAPHICS; DATA FLOW ANALYSIS; DECODING; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; DISTRIBUTED COMPUTER SYSTEMS; DIVIDING CIRCUITS (ARITHMETIC); INTERCONNECTION NETWORKS; MULTIMEDIA SYSTEMS; MULTIPLYING CIRCUITS; RANDOM ACCESS STORAGE;

DIRECT MEMORY ACCESS (DMA) CONTROLLERS; DISCRETE COSINE TRANSFORMS (DCT); FLOATING POINT DIVIDERS;

MICROPROCESSOR CHIPS;

EID: 18344409970     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.799870     Document Type: Article

References (4)

1. D. A. Patterson and J. I. Hennessy, Computer Organization & Hardware/Software Interface. Los Altos, CA: Morgan Kaufmann, 1994.
2. J. Foley, A. van Dam, S. K. Feiner, and J. F. Hughes Computer Graphics. Reading, MA: Addison-Wesley, 1990.
3. K. Kutaragi, M. Suzuoki, T. Hiroi, H. Magoshi, S. Okamoto, M. Oka, A. Ohba, Y. Yamamoto, M. Furuhashi, M. Tanaka, T. Yutaka, T. Okada, M. Nagamatsu, Y. Urakawa, M. Funyu, A. Kunimatsu, H. Goto, K. Hashimoto, N. Ide, H. Murakami, Y. Ohtaguro, and A. Aono, "A microprocessor with a 128b CPU, 10 floating-point MAC's, 4 floating-point dividers, and an MPEG2 decoder," in 1999 ISSCC Dig., p. 256.
4. F. M. Raam, R. A. K. Malik, H. A. Landman, H. Tago, T. Teruyama, T. Sakamoto, T. Yoshida, S. Yoshioka, Y. Fujimoto, T. Kobayashi, T. Hiroi, M. Oka, A. Ohba, M. Suzuoki, T. Yutaka, and Y. Yamamoto, "A high bandwidth superscalar microprocessor for multimedia applications," in 1999 ISSCC Dig., p. 258.