Optoelectronic interconnection technology in the HOLMS system

IEEE Journal on Selected Topics in Quantum Electronics

Volumn 9, Issue 2, 2003, Pages 624-635

  Lukowicz, Paul ^a   Jahns, Jürgen ^b   Barbieri, R ^a   Benabes, P ^c   Bierhoff, T ^d   Gauthier, A ^c   Jarczynski, M ^b   Russell, G A ^e   Schrage, J ^f   Sullau W ^g   Snowdon, J F ^e   Wirz, M ^a   Troster G ^a  

^a ETH ZURICH   (Switzerland)

^b UNIVERSITY OF HAGEN   (Germany)

^c SUPELEC   (France)

^d UNIVERSITY OF PADERBORN   (Germany)

^e HERIOT WATT UNIVERSITY   (United Kingdom)

^f SIEMENS AG   (Germany)

^g Ilfa Feinstleitertechnik GmbH   (Germany)

Author keywords

Integrated optics; Optical computing; Optical interconnections; Optoelectronic packaging; Waveguide interconnections

Indexed keywords

COMPUTER ARCHITECTURE; ELECTRONICS PACKAGING; INTEGRATED OPTICS; OPTICAL INTERCONNECTS; PRINTED CIRCUIT BOARDS; STORAGE ALLOCATION (COMPUTER); SYSTEMS ANALYSIS; VLSI CIRCUITS; WAVEGUIDES;

ELECTRONIC LINKS; HIGH SPEED OPTOELECTRONIC MEMORY SYSTEMS; MEMORY LATENCY; OPTOELECTRONIC INTERCONNECTION TECHNOLOGY; WAVEGUIDE INTERCONNECTION;

INTEGRATED OPTOELECTRONICS;

EID: 10744222687     PISSN: 1077260X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSTQE.2003.815492     Document Type: Article

References (52)

1. M. G. Forbes, S. J. Fancy, M. R. Taghizadeh, J. A. B. Dines, C. R. Stanley, G. Pennelli, A. R. Boyd, P. Horan, D. Byrne, J. Hegarty, S. Eitel, H.-P. Gauggel, K.-H. Gulden, A. Gauthier, P. Benabes, J.-L. Gutzwillwer, A. C. Walker, M. P. Y. Desmulliez, and M. Goetz, "Design and construction of an optoelectronic crossbar switch containing a terabit per second free-space optical interconnect," IEEE J. Select. Topics Quantum Electron., vol. 5, pp. 236-249, Mar.-Apr. 1999.
2. B. T. Lee and M. S. Kwon et al., "Fabrication of polymeric large-core waveguides for optical interconnects using a rubber molding process," IEEE Photon. Technol. Lett., vol. 12, pp. 62-64, Jan. 2000.
3. M. Brunfaut, W. Meeus, J. Dambre, R. Bockstaele, J. Van Campenhout, H. Melchoir, J. Hall, A. Neyer, P. Heremans, J. Van Koetsem, R. King, H. Theinpont, L. Vanwassenhove, and R. Baets, "Demonstrating pof based optoelectronic interconnect in a multi-fpga prototype system," in Proc. 27th Eur. Conf. Opt. Commun., Amsterdam, The Netherlands, Oct. 2001, pp. 298-299.
4. V. Cuppu and B. Jacobb, "Concurrency, latency or system overhead: which has the highest impact on uniprocessor dram-system performance," in Proc. 28th Annu. Symp. Comput. Architec., Goeteborg, Sweden, June 2001.
5. P. Derr, R. Hofmann, B. Greiner, D. Chiarulli, S. Levitan, and M. Robinson, "Demonstration and characterization of multi-channel interconnections using imaging fiber bundles butt coupled to optoelectronic devices," Appl. Opt., vol. 39, no. 5, p. 698, 2000.
6. M. H. Ayliffe, F. A. P. Tooley, D. V. Plant, A. G. Kirk, F. Lacroix, and E. Bernier, "Implementation of a compact, four-stage, scalable optical interconnect for photonic backplane applications," Appl. Opt., vol. 41, no. 8, p. 1541, Mar. 2002.
7. A. Ghose, "OPTIMUL: a hybrid multiprocessor for distributed and shared memory multiprocessing with WDM optical fiber interconnections," in Parallel Architectures and Languages Europe. Munich Germany: Springer-Verlag, 1994.
8. E. Griese, "Optical interconnections on printed circuit boards," Proc. SPIE Opt. Comput., vol. 4089, 2000.
9. ____, "A high-performance hybrid electrical-optical interconnection technology for high-speed electronic systems," IEEE Trans. Adv. Packag., vol. 24, pp. 375-383, Aug. 2001.
10. M. Gruber, S. Sinzinger, and J. Jahns, Planar-Integrated Opt. Vector-Matrix Multiplier, vol. 39, p. 5367, 2000.
11. E. Yuceturk, P. J. Marchand, S. C. Esener, V. H. Ozguz, Y. Liu, G. Li and D. Huang, "Three-dimensional optoelectronic stacked processor by use of free-space optical interconnection and three-dimensional VLSI chip stacks," Appl. Opt., vol. 41, no. 2, p. 348, 2002.
12. V. Baukens, H. Ottevaere, G. Verschaffelt, P. Tuteleers, P. Vynck, B. Volckaerts, A. Hermanne, I. Veretennicoff, H. Thienpont, and C. Debaes, "Plastic micro-optical interconnection modules for parallel free-space intra mcm data communication," Proc. IEEE, vol. 88, pp. 769-779, June 2000.
13. J.-H. Ha and T. M. Pinkston, "SPEED DMON: Cache coherence on an optical multichannel interconnect architecture," J. Parallel Distributed Comput., vol. 41, no. 1, pp. 78-91, 1997.
14. H. J. Haumann, H. Kobolla, F. Suer, J. Schmidt, J. Schwider, W. Stork, N. Steibl, and R. Vikel, "Optoelectronic interconnection based on a light-guiding plate with holographic coupling elements," Opt. Eng., vol. 30, 1990.
15. D. C. Hoffmeister, J. Chu, J. A. Perreault, and P. Dowd, "Lightning network and systems architecture," in Parallel Computing Using Optical Interconnections, K. Li, Y. Pan, and S. Q. Zheng, Eds. Norwell, MA: Kluwer, 1998, pp. 4-21.
16. H. Huber, J. Moisel, and J. Guttmann, "Polymer waveguides for 100 cm (40″) optical backplanes," Proc. SPIE, pp. 4805-4815, 2002.
17. J. Depreitere, J. Van Campenhout, H. Van Marck, and J. Dambre, "Optoelectronic FPGAs," IEEE J. Select. Topics Quantum Electron., vol. 5, pp. 306-315, Mar.-Apr. 1999.
18. J. Van Campenhout, C. Jesshope, M. Desmulliez, H. Thienpont, J. Goodman, J. H. Collet, D. Litaize, and A. Louri, "Architectural approach to the role of optics in monoprocessor and multiprocessor machines," Appl. Opt., vol. 39, no. 5, 2000.
19. J. Jahns, "Planar packaging of free-space optical interconnections," Proc. IEEE, vol. 82, pp. 1623-1631, Nov. 1994.
20. J. Jahns and A. Huang, Planar Integration Free-Space Opt. Components, vol. 28, pp. 1602-1605, 1989.
21. K.-Y. J. Li and K. Jenkins, Opt. Parallel-Access Shared-Memory Syst.: Anal. Exper. Demonstr., vol. 34, no. 2, pp. 358, 1995.
22. Y. Li and J. Ai, "Polymer fiber-image-guide-based embedded optical circuit board," Appl. Opt., vol. 38, no. 2, pp. 325, 1999.
23. A. G. Kirk, D. V. Plant, T. H. Szymanski, Z. G. Vranesic, J. A. Trezza, F. A. P. Tooley, D. R. Rolston, M. H. Ayliffe, F. Lacroix, D. Kabal, B. Robertson, E. Bernier, D. F. Brosseau, F. S. J. Michael, and A. Chuah, "A modulator-based multistage free-space optical interconnection system," Proc. Opt. Comput., pp. 449-459, 2000.
24. D. Krabe and W. Scheel, "Optical interconnects by hot embossing for module and PCB technology," in Proc. 49th Electron. Components Technol. Conf., San Diego, CA, 1999, pp. 1164-1166.
25. S. Lehmacher and A. Neyer, "Integration of polymer optical waveguides into printed circuit boards," Electron. Lett., vol. 36, no. 12, pp. 1052-1053, 2000.
26. A. Ahmed Louri and B. Brent Weech, "Scalable optical interconnection networks for large-scale parallel computers," in Parallel Computing Using Optical Interconnections, K. Li, Y. Pan, and S. Q. Zheng, Eds. Norwell, MA: Kluwer, 1998, pp. 48-74.
27. P. Lukowicz, "Design of an efficient shared memory architecture using hybrid opto-electronic VLSI circuits and space invariant optical busses," in Proc. 3rd Int. Conf. Massively Parallel Process. Using Opt. Interconnect. Maui, Hawaii, Oct. 1996, pp. 231-238.
28. ____, "Giga-cache: A high performance opto-electronic memory architecture," in Proc. Workshop Critical Technol. Comput., SPIE Annu. Meeting, San Diego, CA, 2000.
29. ____, "Reducing communication and memory latency in computer systems using opto-electronic interconnections," in Proc. Progress Electromagnet. Res. Symp., Boston, 2000, p. 320.
30. P. Lukowicz, S. Sinzinger, K. Dunkel, and H.-D. Bauer, "Design of an opto-electronic VLSI/parallel fiber bus," J. Eur. Opt. Soc. Part-A, pp. 367-370, 1999.
31. M. Dal Cinand, W. Hohland, T. Dalibor, S. Eckert, A. Hessenauer, H. Grygier, U. Hildebrand, J. Hnig, F. Hofmann, C.-U. Linster, E. Pataricza Michel, A. Sieh, V. Thiel, and T. Turowski, "Architecture and realization of the modular expandable multiprocessor system memsy," in Proc. 1st Int. Conf. Massively Parallel Comput. Syst., 1994, pp. 7-15.
32. J. Jahns, S. Sinzinger, M. Gruber, and E. ElJoudi, "Practical realization of massively parallel fiber-free-space optical interconnects," Appl. Opt., vol. 40, pp. 2902-2908, 2001.
33. D. R. Rolston, A. G. Kirk, D. V. Plant, M. H. Ayliffe, and M. Teauneuf, "Six-degrees-of-freedom alignment of two-dimensional array components by use of off-axis linear fresnel zone plates," Appl. Opt., vol. 40, no. 35, pp. 6515, 2001.
34. P. Milojkovic, J. Ekman, P. Chandramani, R. Rozier, F. Kiamilev, Y. Liu, M. Hibbs-Brenner, M. W. Haney, and M. P. Christensen, "Multichip free-space global optical interconnection demonstration with integrated arrays of vertical-cavity surface-emitting lasers and photodetectors," Appl. Opt., vol. 38, no. 29, p. 6190, 1999.
35. D. A. B. Miller, "Optical interconnects to silicon," IEEE J. Select. Topics Quantum Electron., vol. 6, pp. 1312-1317, Nov.-Dec. 2000.
36. D. A. B. Miller, "Optical interconnects to silicon," IEEE J. Select. Topics Quantum Electron., vol. 6, pp. 1312-1317, Nov.-Dec. 2000.
37. A. G. Nowatzyk and P. R. Pruncal, "Are crossbars really dead? The cose for optical multiprocessor interconnect systems," in Proc. 22nd Int. Symp. Comput. Architec., Gold Coast, Italy, 1995.
38. V. Ozguz, J. Carson, M. Hibbs-Brenner, Y. Liu, F. Kiamilev, P. Marchand, S. Esener, and L. Coldren, "3-D-optoelectronic stacked processors: Technology development," in Proc. Opt. Comput., Apr. 1999.
39. R. Barbieri, G. Tröster, S. Fancey-Matthias, G. Jurgen, J. W. F. Tichy, P. Lukowicz, and J. Grzyb, "Making optical interconnection packaging compatible with electronic assembly technology," Opt. Memory Neural Networks, vol. 4, 2002.
40. T. M. Pinkston, "Design considerations for optical interconnects in parallel computers," in Proc. 1st Int. Workshop Massively Parallel Process. Using Opt. Interconnect., 1994, p. 151.
41. C. Choi, R. Chen, and L. Lin, "Fully embedded board-level guided wave optoelectronic interconnects," Proc. IEEE, vol. 88, pp. 780-792, June 2000.
42. H. Matsuoka, S. Nishimura, H. Inoue, and T. Yokota, "Optical interconnection subsystem used in the RWC-1 massively parallel computer," IEEE J. Select. Topics Quantum Electron., vol. 5, pp. 360-367, Mar.-Apr. 1999.
43. T. Sakano, T. Matsumoto, K. Noguchi, and T. Sawabe, Design Perform. Multiprocess. Syst. Employing Board-to-Board Free Space Opt. Interconnect.: Cosine-1, vol. 30, no. 17, pp. 2334-2342, 1991.
44. A. Salsbury, F. Pong, and A. Nowatzyk, "Missing the memory wall: The case for processor/memory integration," in Proc. 23rd Annu. Int. Symp. Comput. Architec., May 22-24, 1996, pp. 90-103.
45. S. Shibayama, K. Hamaguchi, T. Fukui, Y. Sudo, T. Shimoyama, and S. Nakamura, "An optical bus computer cluster with a deferred cache coherence protocol," in Proc. Int. Conf. Parallel Distributed Syst., June 3-6, 1996, pp. 175-182.
46. S. Sinzinger and J. Jahns, Integrated Microopt. Imag. Syst. High Interconnect. Capacity Fabricated Planar Opt., vol. 39, pp. 4729-4735, 1997.
47. J. Grzyb, S. Fancey, J. Jurgen Jahns, and P. Paul Lukowicz, "Low latency opto-electronic processor memory interconnection demonstrator," in Proc. SPIE Annu. Meeting, San Diego, CA, July 2001.
48. C. Svensson. (2001) Electrical Interconnects Revitalized. Linköping University. Available: http://www.ek.isy.liu.se/christer/CSPapers.htm
49. T. H. Szymanski, "Parallel computing with 'intelligent optical networks'," in Parallel Computing Using Optical Interconnections, K. Li, Y. Pan, and S. Q. Zheng, Eds. Norwell, MA: Kluwer, 1998, pp. 26-44.
50. D. Huang, O. Kibar, N. S. E. Ozkan, S. C. Esener, X. Zheng, and P. J. Marchand, "Optomechanical design and characterization of a printed-circuit-board-based free-space optical interconnect package," Appl. Opt., vol. 38, no. 26, p. 5631, 1999.
51. H. Kosaka, S. Kawai, K. Kasahara, Y. Li, and T. Wang, Fiber-Image-Guide-Based Bit-Parallel Opt. Interconnects, vol. 35, no. 35, p. 6920, 1996.
52. E. E. E. Frietman and F. Zhao, "Optical multi-faceted free-space image distributor for massively parallel processing," in Proc. MPPOI Las Vegas, NV, June 1998.