Novel dual bit tri-gate charge trapping memory devices

IEEE Electron Device Letters

Volumn 25, Issue 12, 2004, Pages 810-812

  Specht, M ^a   Kommling R ^a   Hofmann, F ^a   Klandzievski, V ^a   Dreeskornfeld, L ^a   Weber, W ^a   Kretz, J ^a   Landgraf, E ^a   Schulz, T ^a   Hartwich, J ^a   Rosner W ^a   Stadele M ^a   Luyken, R J ^a   Reisinger, H ^a   Graham, A ^a   Hartmann, E ^b   Risch, L ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b SOPRA   (France)

Author keywords

Charge injection; Charge trapping memory; Semiconductor device fabrication; Tri gate transistor

Indexed keywords

DIELECTRIC MATERIALS; ELECTRIC CURRENTS; ELECTROSTATICS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE; TRANSISTORS;

CHARGE INJECTION; CHARGE TRAPPING MEMORY; ELECTROSTATIC GATE CONTROL; TRI-GATE TRANSISTOR;

NONVOLATILE STORAGE;

EID: 10644253706     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.838621     Document Type: Article

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