Device design for subthreshold slope and threshold voltage control in sub-100-nm fully depleted SOI MOSFETs

IEEE Transactions on Electron Devices

Volumn 51, Issue 12, 2004, Pages 2161-2167

  Numata, Toshinori ^a   Takagi, Shin Ichi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

MOSFETs; Silicon on insulator

Indexed keywords

CAPACITANCE; OPTIMIZATION; PERMITTIVITY; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

SHORT CHANNEL EFFECTS; SUBTHRESHOLD SLOPE; THRESHOLD VOLTAGE CONTROL;

MOSFET DEVICES;

EID: 10644245161     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.839760     Document Type: Article

References (12)

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