Co-design optimization of laminate substrates for high speed applications

Proceedings - Electronic Components and Technology Conference

Volumn 2, Issue , 2004, Pages 1776-1783

  De Araujo, D N ^a   Cases, M ^a   Pham, N ^a   Matoglu, E ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MULTI-CHIP MODULES (MCM); PLASTIC BALL GRID ARRAY (PBGA) PACKAGES; SINGLE-CHIP MODULES (SCM); TIME DOMAIN REFLECTOMETRY (TDR);

BANDWIDTH; COST EFFECTIVENESS; ELECTRIC POWER DISTRIBUTION; FREQUENCY DOMAIN ANALYSIS; INTERFACES (MATERIALS); OPTIMIZATION; SUBSTRATES; TIME DOMAIN ANALYSIS;

LAMINATES;

EID: 10444270930     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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8. th Electronic Components and Technology Conference, Las Vegas, NV, May 2000, pp 760.