Multi-port ESD protection using bi-directional SCR structures

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 2003, Pages 137-140

  Vashchenko, V A ^a   Concannon, A ^a   Ter Beek, M ^a   Hopper, P ^a  

^a NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC DISCHARGES; ELECTROSTATICS;

ANALOG CIRCUITS; ELECTROSTATIC DISCHARGE PROTECTION;

LINEAR INTEGRATED CIRCUITS;

EID: 1042300821     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. S. Dabral, T. J. Maloney, Basic ESD and I/O Design. New York: Wiley, 1998.
2. C. Torres, J. Miller, M. Stockinger, M. Akers, M.Khazhinsky, J Weldon "Modular, Portable and easily simulatable ESD protection networks for advanced CMOS technologies" Proceedings of EOS/ESD Symp. 2001 p82-95.
3. W. Anderson "ESD protection under the wire bonding pads" Proc. of EOS/ESD Symp. 1999 p88-94
4. IEC1000-4.2 specifications.
5. V. A. Vashchenko, A. Concannon, M. ter Beek, and P. Hopper, "Increasing the ESD Protection Capability of Over-voltage NMOS Structures by Comb-Ballasting Region Design," Proceedings of IRPS 2003, pp. 261-268.
6. V. A. Vashchenko, A. Concannon, M. ter Beek, and P. Hopper, "Comparison of ESD Protection Capability of lateral BJT, SCR and bi-directional SCR for Hi-Voltage BiCMOS Circuits", in Proceed. of BCTM, 2002, pp. 181-184.
7. "TSUPREME4", "MEDICI", Versions 2002.4.0. Reference Manual, Synopsys, 2002.
8. V. A. Vashchenko, A. Concannon, M. ter Beek, and P. Hopper, "LVTSCR structures for latch-up free ESD protection of BiCMOS RF circuits," Microelectronics Reliability, 2003, vol.43, pp.61-69.