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Volumn , Issue , 2003, Pages 737-740

Vertical multi-RESURF MOSFETs exhibiting record low specific resistance

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC RESISTANCE; ETCHING; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS; VAPOR PHASE EPITAXY;

EID: 0842331303     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (7)
  • 1
    • 0032256942 scopus 로고    scopus 로고
    • A new generation of high voltage MOSFETs breaks the limit line of silicon
    • G.Deboy et al., "A new generation of high voltage MOSFETs breaks the limit line of silicon", IEDM, pp.683-685, 1998.
    • (1998) IEDM , pp. 683-685
    • Deboy, G.D.1
  • 2
    • 0036053620 scopus 로고    scopus 로고
    • 2 680V Silicon Superjunction MOSFET
    • 2 680V Silicon Superjunction MOSFET", ISPSD, pp.241-244, 2002.
    • (2002) ISPSD , pp. 241-244
    • Onishi, Y.1
  • 3
    • 0042515318 scopus 로고    scopus 로고
    • 200V multi RESURF trench MOSFET (MR-TMOS)
    • T.Kurosaki et al., "200V multi RESURF trench MOSFET (MR-TMOS)", ISPSD, pp.211-214, 2003.
    • (2003) ISPSD , pp. 211-214
    • Kurosaki, T.K.1
  • 4
    • 0042014561 scopus 로고    scopus 로고
    • Novel trench concept for the fabrication of compensation devices
    • M.Rüb et al., "Novel trench concept for the fabrication of compensation devices", ISPSD, pp.203-206, 2003.
    • (2003) ISPSD , pp. 203-206
    • Rüb, M.1
  • 5
    • 0030121728 scopus 로고    scopus 로고
    • Shallow p-type Layers in Si by Rapid Vapor-Phase Doping for High Speed Bipolar and MOS Applications
    • Y.Kiyota, T.Nakamura, S.Suzuki, T.Inada, "Shallow p-type layers in Si by Rapid Vapor-Phase Doping for high speed bipolar and MOS applications", IEICE Trans. Elec., Vol. E79-C, pp. 554-558, 1996
    • (1996) IEICE Trans. Elec. , vol.E79-C , pp. 554-558
    • Kiyota, Y.1    Nakamura, T.2    Suzuki, S.3    Inada, T.4
  • 6
    • 0036045603 scopus 로고    scopus 로고
    • Manufacturing of high aspect ratio p-n junctions using Vapor Phase Doping for application in multi-Resurf devices
    • C.Rochefort, R. van Dalen, N.Duhayon, W.Vandervorst, "Manufacturing of high aspect ratio p-n junctions using Vapor Phase Doping for application in multi-Resurf devices", ISPSD, pp.237-240, 2001.
    • (2001) ISPSD , pp. 237-240
    • Rochefort, C.1    Van Dalen, R.2    Duhayon, N.3    Vandervorst, W.4
  • 7
    • 84941490928 scopus 로고
    • Optimum design of power MOSFETs
    • C.Hu, "Optimum design of power MOSFETs", IEEE Trans. Elec. Dev., Vol. 31, pp.1693-1700, 1984.
    • (1984) IEEE Trans. Elec. Dev. , vol.31 , pp. 1693-1700
    • Hu, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.