-
1
-
-
0026140567
-
The interaction of architecture and operating system design
-
April
-
T. E. Anderson, et al. "The interaction of architecture and operating system design." In Proc. ASPLOS-4, April 1991, pp. 108-120.
-
(1991)
Proc. ASPLOS-4
, pp. 108-120
-
-
Anderson, T.E.1
-
2
-
-
0026140643
-
Virtual memory primitives for user programs
-
April
-
A. W. Appel and K. Li. "Virtual memory primitives for user programs." In Proc. ASPLOS-4, April 1991, pp. 96-107.
-
(1991)
Proc. ASPLOS-4
, pp. 96-107
-
-
Appel, A.W.1
Li, K.2
-
3
-
-
85022153860
-
Software prefetching and caching for translation lookaside buffers
-
Nov.
-
K. Bala, M. F. Kaashoek, and W. E. Weihl. "Software prefetching and caching for translation lookaside buffers." In Proc. OSDI-1, Nov. 1994.
-
(1994)
Proc. OSDI-1
-
-
Bala, K.1
Kaashoek, M.F.2
Weihl, W.E.3
-
4
-
-
84883514989
-
The measured performance of personal computer operating systems
-
December
-
J. B. Chen, et al. "The measured performance of personal computer operating systems." In Proc. SOSP-15, December 1995, pp. 299-313.
-
(1995)
Proc. SOSP-15
, pp. 299-313
-
-
Chen, J.B.1
-
7
-
-
0022020051
-
Performance of the VAX-11/780 translation buffer
-
February
-
D. W. Clark and J. S. Emer. "Performance of the VAX-11/780 translation buffer." ACM Trans. Comp. Sys, vol. 3, no. 1, February 1985
-
(1985)
ACM Trans. Comp. Sys
, vol.3
, Issue.1
-
-
Clark, D.W.1
Emer, J.S.2
-
10
-
-
0003499027
-
Adding fast interrupts to superscalar processors
-
MIT Computation Structures Group, December
-
D. S. Henry. "Adding fast interrupts to superscalar processors." Tech. Rep. Memo-366, MIT Computation Structures Group, December 1994.
-
(1994)
Tech. Rep. Memo-366
-
-
Henry, D.S.1
-
11
-
-
0022807551
-
Design decisions in SPUR
-
November
-
M. D. Hill, et al. "Design decisions in SPUR." IEEE Computer, vol. 19, no. 11, November 1986.
-
(1986)
IEEE Computer
, vol.19
, Issue.11
-
-
Hill, M.D.1
-
12
-
-
0027271324
-
Architectural support for translation table management in large address space machines
-
May
-
J. Huck and J. Hays. "Architectural support for translation table management in large address space machines." In ISCA-20, May 1993.
-
ISCA-20
, pp. 1993
-
-
Huck, J.1
Hays, J.2
-
13
-
-
0030784136
-
Software-managed address translation
-
February
-
B. L. Jacob and T. N. Mudge. "Software-managed address translation." In Proc. HPCA-3, February 1997, pp. 156-167.
-
(1997)
Proc. HPCA-3
, pp. 156-167
-
-
Jacob, B.L.1
Mudge, T.N.2
-
14
-
-
0032119566
-
Virtual memory in contemporary microprocessors
-
July/August
-
B. L. Jacob and T. N. Mudge. "Virtual memory in contemporary microprocessors." IEEE Micro, vol. 18, no. 4, July/August 1998.
-
(1998)
IEEE Micro
, vol.18
, Issue.4
-
-
Jacob, B.L.1
Mudge, T.N.2
-
15
-
-
0032095071
-
Virtual memory: Issues of implementation
-
June
-
B. L. Jacob and T. N. Mudge. "Virtual memory: Issues of implementation." IEEE Computer, vol. 31, no. 6, pp. 33-43, June 1998.
-
(1998)
IEEE Computer
, vol.31
, Issue.6
, pp. 33-43
-
-
Jacob, B.L.1
Mudge, T.N.2
-
16
-
-
0030717768
-
Run-time adaptive cache hierarchy management via reference analysis
-
June
-
T. L. Johnson and W.-M. W. Hwu. "Run-time adaptive cache hierarchy management via reference analysis." In Proc. ISCA-24, June 1997.
-
(1997)
Proc. ISCA-24
-
-
Johnson, T.L.1
Hwu, W.-M.W.2
-
18
-
-
0011277378
-
Guarded page tables on MIPS R4600
-
January
-
J. Liedtke and K. Elphinstone. "Guarded page tables on MIPS R4600." ACM Operating Systems Review, vol. 30, no. 1, pp. 4-15, January 1996.
-
(1996)
ACM Operating Systems Review
, vol.30
, Issue.1
, pp. 4-15
-
-
Liedtke, J.1
Elphinstone, K.2
-
20
-
-
0001944474
-
Precise interrupts
-
February
-
M. Moudgill and S. Vassiliadis. "Precise interrupts." IEEE Micro, vol. 16, no. 1, pp. 58-67, February 1996.
-
(1996)
IEEE Micro
, vol.16
, Issue.1
, pp. 58-67
-
-
Moudgill, M.1
Vassiliadis, S.2
-
21
-
-
0347133030
-
Optimal allocation of on-chip memory for multiple-API operating systems
-
April
-
D. Nagle, et al. "Optimal allocation of on-chip memory for multiple-API operating systems." In Proc. ISCA-21, April 1994.
-
(1994)
Proc. ISCA-21
-
-
Nagle, D.1
-
22
-
-
0345871792
-
Design tradeoffs for software-managed TLBs
-
May
-
D. Nagle, et al. "Design tradeoffs for software-managed TLBs." In Proc. ISCA-20, May 1993.
-
(1993)
Proc. ISCA-20
-
-
Nagle, D.1
-
23
-
-
0024057438
-
Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures
-
August
-
R. Rashid, et al. "Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures." IEEE Transactions on Computers, vol. 37, no. 8, pp. 896-908, August 1988.
-
(1988)
IEEE Transactions on Computers
, vol.37
, Issue.8
, pp. 896-908
-
-
Rashid, R.1
-
24
-
-
84948125832
-
Reducing conflicts in direct-mapped caches with a temporality-based design
-
Aug.
-
J. A. Rivers and E. S. Davidson. "Reducing conflicts in direct-mapped caches with a temporality-based design." In Proc. ICPP-96, Aug. 1996.
-
(1996)
Proc. ICPP-96
-
-
Rivers, J.A.1
Davidson, E.S.2
-
25
-
-
0002534250
-
The impact of architectural trends on operating system performance
-
December
-
M Rosenblum, et al. "The impact of architectural trends on operating system performance." In Proc. SOSP-15, December 1995
-
(1995)
Proc. SOSP-15
-
-
Rosenblum, M.1
-
26
-
-
0346502584
-
-
US Patent Office, no. 4,774,659, Sep. 1988
-
J. E. Smith, G. E. Dermer, and M. A. Goldsmith. Computer System Employing Virtual Memory. US Patent Office, no. 4,774,659, Sep. 1988.
-
Computer System Employing Virtual Memory
-
-
Smith, J.E.1
Dermer, G.E.2
Goldsmith, M.A.3
-
27
-
-
0024013595
-
Implementing precise interrupts in pipelined processors
-
May
-
J. E. Smith and A. R. Pleszkun. "Implementing precise interrupts in pipelined processors." IEEE Trans. Computers, vol. 37, no. 5, May 1988.
-
(1988)
IEEE Trans. Computers
, vol.37
, Issue.5
-
-
Smith, J.E.1
Pleszkun, A.R.2
-
28
-
-
85084722295
-
Instruction issue logic for high-performance, interruptable pipelined processors
-
June '87
-
G. S. Sohi and S. Vajapeyam. "Instruction issue logic for high-performance, interruptable pipelined processors." In ISCA-14, June '87.
-
ISCA-14
-
-
Sohi, G.S.1
Vajapeyam, S.2
-
29
-
-
84978398777
-
Surpassing the TLB performance of superpages with less operating system support
-
Oct. '94
-
M. Talluri and M. D. Hill. "Surpassing the TLB performance of superpages with less operating system support." In ASPLOS-6, Oct. '94.
-
ASPLOS-6
-
-
Talluri, M.1
Hill, M.D.2
-
31
-
-
84883026682
-
Hardware and software support for efficient exception handling
-
October
-
C. A. Thekkath and H. M. Levy. "Hardware and software support for efficient exception handling." In Proc. ASPLOS-6, October 1994.
-
(1994)
Proc. ASPLOS-6
-
-
Thekkath, C.A.1
Levy, H.M.2
-
32
-
-
0029508817
-
A modified approach to data cache management
-
November
-
G. Tyson, et al. "A modified approach to data cache management." In Proc. MICRO-28, November 1995, pp. 93-103.
-
(1995)
Proc. MICRO-28
, pp. 93-103
-
-
Tyson, G.1
-
33
-
-
0542438573
-
-
Personal communication
-
M. Upton. Personal communication. 1997.
-
(1997)
-
-
Upton, M.1
-
34
-
-
0029323666
-
Interrupt processing in concurrent processors
-
June
-
W. Walker and H. G. Cragon. "Interrupt processing in concurrent processors." IEEE Computer, vol. 28, no. 6, June 1995.
-
(1995)
IEEE Computer
, vol.28
, Issue.6
-
-
Walker, W.1
Cragon, H.G.2
-
35
-
-
0026918393
-
Consistency management for virtually indexed caches
-
October
-
B. Wheeler and B. N. Bershad. "Consistency management for virtually indexed caches." In Proc. ASPLOS-S, October 1992, pp. 124-136.
-
(1992)
Proc. ASPLOS-S
, pp. 124-136
-
-
Wheeler, B.1
Bershad, B.N.2
|