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Volumn , Issue , 2003, Pages 647-650

Resonant clocking using distributed parasitic capacitance

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC INDUCTORS; ELECTRIC POTENTIAL; ELECTRIC WIRE; INDUCTANCE; PIPELINE PROCESSING SYSTEMS; VARIABLE FREQUENCY OSCILLATORS;

EID: 0242695837     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (7)
  • 1
    • 0035054909 scopus 로고    scopus 로고
    • Physical design of a fourth-generation POWER GHz microprocessor
    • Feb.
    • C. J. Anderson, et al, "Physical design of a fourth-generation POWER GHz microprocessor," ISSCC Digest of Technical Papers, pp. 232-233, Feb. 2001.
    • (2001) ISSCC Digest of Technical Papers , pp. 232-233
    • Anderson, C.J.1
  • 2
    • 0035334849 scopus 로고    scopus 로고
    • A clock distribution network for microprocessors
    • May
    • P. J. Restle, et al, "A clock distribution network for microprocessors," IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 792-799, May 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.5 , pp. 792-799
    • Restle, P.J.1
  • 3
    • 0035507075 scopus 로고    scopus 로고
    • Rotary traveling wave oscillator arrays: A new clock technology
    • Nov.
    • J. Wood, T. C. Edwards and S. Lipa, "Rotary traveling wave oscillator arrays: a new clock technology," IEEE J. Solid-State Circuits, vol. 35, no. 11, pp. 1561-1569, Nov. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.11 , pp. 1654-1665
    • Wood, J.1    Edwards, T.C.2    Lipa, S.3
  • 4
    • 0034316283 scopus 로고    scopus 로고
    • The design and implementation of a low-power clock-powered microprocessor
    • Nov.
    • W. Athas, et al, "The design and implementation of a low-power clock-powered microprocessor," IEEE J. Solid-State Circuits, vol. 35, no. 11, pp. 1561-1569, Nov. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.11 , pp. 1561-1569
    • Athas, W.1
  • 5
    • 84951755599 scopus 로고    scopus 로고
    • Design, verification, and test of a true single-phase 8-bit adiabatic multiplier
    • Mar
    • S. Kimm, et al, "Design, verification, and test of a true single-phase 8-bit adiabatic multiplier," Proc. 2001 Conf. on Advanced Research in VLSI, pp. 42-58, Mar 2001.
    • (2001) Proc. 2001 Conf. on Advanced Research in VLSI , pp. 42-58
    • Kimm, S.1
  • 6
    • 0034790451 scopus 로고    scopus 로고
    • A 0.13-μm SOI CMOS technology for low-power digital and RF applications
    • June
    • N. Zamdmer, et al, "A 0.13-μm SOI CMOS technology for low-power digital and RF applications," 2001 Symposium on VLSI Technology, pp. 85-86, June 2001.
    • (2001) 2001 Symposium on VLSI Technology , pp. 85-86
    • Zamdmer, N.1
  • 7
    • 0041947475 scopus 로고    scopus 로고
    • Suitability of scaled SOI CMOS for high-frequency analog circuits
    • Sep
    • N. Zamdmer, et al, "Suitability of scaled SOI CMOS for high-frequency analog circuits," ESSDERC 2002, pp. 511-514, Sep 2002.
    • (2002) ESSDERC 2002 , pp. 511-514
    • Zamdmer, N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.