-
1
-
-
0034464981
-
Placement of substrate contacts to alleviate substrate noise in epi and non-epi technologies
-
Aug.
-
T.E. Secareanu, S. Warner, S. Seabridge, C. Burke et al, "Placement of Substrate Contacts to Alleviate Substrate Noise in Epi and Non-Epi Technologies", Proc. 43rd IEEE Midwest Symp. On Circuits and Systems, pp. 1314-1318, Aug. 2000.
-
(2000)
Proc. 43rd IEEE Midwest Symp. On Circuits and Systems
, pp. 1314-1318
-
-
Secareanu, T.E.1
Warner, S.2
Seabridge, S.3
Burke, C.4
-
2
-
-
0033700093
-
High-level simulation of substrate noise generation including power supply noise coupling
-
M. v. Heijningen, M. Badaroglu, S. Donnay, M. Engels, I. Bolsens, "High-Level Simulation of Substrate Noise Generation Including Power Supply Noise Coupling", IEEE Proc. 37th Design Automation Conference, pp. 446ff, 2000.
-
(2000)
IEEE Proc. 37th Design Automation Conference
-
-
V. Heijningen, M.1
Badaroglu, M.2
Donnay, S.3
Engels, M.4
Bolsens, I.5
-
3
-
-
0242425379
-
Reduced-order modelling of large passive linear circuits by means of the SyPVL algorithm
-
Manuscript No. 96-13; Murray Hill, New Jersey
-
Freund, R., "Reduced-Order Modelling of Large Passive Linear Circuits by Means of the SyPVL Algorithm", Numerical Analysis Manuscript No. 96-13, Murray Hill, New Jersey, 1996
-
(1996)
Numerical Analysis
-
-
Freund, R.1
-
4
-
-
0001431369
-
Modeling and measurement of substrate in Si-bipolar IC's up to 40 GHz
-
Apr.
-
M. Pfost, H-M. Rein, "Modeling and Measurement of Substrate in Si-Bipolar IC's up to 40 GHz", J. Solid-State Circuits, Vol. 33, pp. 582-591, Apr. 1998
-
(1998)
J. Solid-State Circuits
, vol.33
, pp. 582-591
-
-
Pfost, M.1
Rein, H.-M.2
-
5
-
-
0029487138
-
Extraction of circuit models for substrate cross-talk
-
Nov.
-
T. Smedes, N.P. van der Meijs, A.J. van Genderen, "Extraction of Circuit Models for Substrate Cross-Talk", IEEE Proc. ICCAD, pp. 199-206, Nov. 1995
-
(1995)
IEEE Proc. ICCAD
, pp. 199-206
-
-
Smedes, T.1
Van Der Meijs, N.P.2
Van Genderen, A.J.3
-
6
-
-
0030110592
-
Modeling and analysis of substrate coupling in integrated circuits
-
Mar.
-
R. Gharpurey, R.G. Meyer, "Modeling and Analysis of Substrate Coupling in Integrated Circuits", J. Solid-State Circuits, Vol. 31, pp. 344-353, Mar. 1996
-
(1996)
J. Solid-State Circuits
, vol.31
, pp. 344-353
-
-
Gharpurey, R.1
Meyer, R.G.2
-
7
-
-
0030110603
-
Verification techniques for substrate coupling and their application to mixed-signal IC design
-
N.K. Verghese, D.J. Allstot, M.A. Wolfe, "Verification Techniques for Substrate Coupling and their Application to Mixed-Signal IC Design", J. Solid-State Circuits, Vol. 31, pp. 254ff, 1996
-
(1996)
J. Solid-State Circuits
, vol.31
-
-
Verghese, N.K.1
Allstot, D.J.2
Wolfe, M.A.3
-
8
-
-
0031635927
-
Multilevel integral equation methods for the extraction of substrate coupling parameters in mixed-signal IC's
-
M. Chou, J. White, "Multilevel Integral Equation Methods for the Extraction of Substrate Coupling Parameters in Mixed-Signal IC's", Proc. 35th DAC, pp. 20-25, 1998
-
(1998)
Proc. 35th DAC
, pp. 20-25
-
-
Chou, M.1
White, J.2
-
9
-
-
0031628214
-
Efficient three-dimensional extraction based on static and full-wave layered green's functions
-
Zhao, J.; Dai, W. M.; Kadur, S.; Long, D. E.; "Efficient Three-Dimensional Extraction Based on Static and Full-Wave Layered Green's Functions"; Proc. 35th DAC, pp. 224-229, 1998.
-
(1998)
Proc. 35th DAC
, pp. 224-229
-
-
Zhao, J.1
Dai, W.M.2
Kadur, S.3
Long, D.E.4
-
10
-
-
0029538064
-
Integrated circuit substrate coupling models based on voronoi tessellation
-
Dec.
-
I.L. Wemple, A.T. Yang, "Integrated Circuit Substrate Coupling Models Based on Voronoi Tessellation", IEEE Trans. Computer Aided Design, Vol. 14, pp. 1459-1469, Dec. 1995
-
(1995)
IEEE Trans. Computer Aided Design
, vol.14
, pp. 1459-1469
-
-
Wemple, I.L.1
Yang, A.T.2
-
11
-
-
0027929105
-
LAYIN: Toward a global solution for parasitic coupling modeling and visualization
-
Clement, F.J.R., Zysman, E, Kayal, M., Declercq, M. "LAYIN: Toward a Global Solution for Parasitic Coupling Modeling and Visualization", IEEE Proc. CICC, pp. 537-540, 1994
-
(1994)
IEEE Proc. CICC
, pp. 537-540
-
-
Clement, F.J.R.1
Zysman, E.2
Kayal, M.3
Declercq, M.4
-
12
-
-
0242593435
-
PARCOURS - Substrate crosstalk analysis for complex mixed-signal circuits
-
A. Hermann, M. Silvant, J. Schlöffel, E. Barke, "PARCOURS - Substrate Crosstalk Analysis for Complex Mixed-Signal Circuits", PATMOS 2000, Sept. 2000
-
PATMOS 2000, Sept. 2000
-
-
Hermann, A.1
Silvant, M.2
Schlöffel, J.3
Barke, E.4
-
13
-
-
0032099290
-
Efficient real-time modelling of substrate coupling in large mixed-signal Spice designs, using analogue HDL
-
R. Singh, S. Sali, "Efficient real-time modelling of substrate coupling in large mixed-signal Spice designs, using analogue HDL", Proc. Circuits Devices Systems, Vol. 145, No. 3, 1998
-
(1998)
Proc. Circuits Devices Systems
, vol.145
, Issue.3
-
-
Singh, R.1
Sali, S.2
|