Fast reconfigurable systolic hardware for modular multiplication and exponentiation

Journal of Systems Architecture

Volumn 49, Issue 7-9, 2003, Pages 387-396

  Nedjah, Nadia ^a   De Macedo Mourelle, Luiza ^a  

^a STATE UNIVERSITY OF RIO DE JANEIRO   (Brazil)

Author keywords

Binary exponentiation; Montgomery algorithm; RSA cryptosystems

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; SYSTOLIC ARRAYS;

MONTGOMERY ALGORITHMS;

CRYPTOGRAPHY;

EID: 0242540542     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1383-7621(03)00089-4     Document Type: Article

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