Improved linear systolic array for fast modular exponentiation

IEE Proceedings: Computers and Digital Techniques

Volumn 147, Issue 5, 2000, Pages 323-328

  Walter, C D ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CRYPTOGRAPHY; DATA COMMUNICATION SYSTEMS; EMBEDDED SYSTEMS; SMART CARDS;

DIFFERENTIAL POWER ANALYSIS; MODULAR EXPONENTIATION;

SYSTOLIC ARRAYS;

EID: 0034264735     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20000638     Document Type: Article

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