Scaling of flash NVRAM to 10's of nm by decoupling of storage from read/sense using back-floating gates

IEEE Transactions on Nanotechnology

Volumn 1, Issue 4, 2002, Pages 247-253

  Kumar, Arvind ^a,b   Tiwari, Sandip ^a,b  

^a IEEE   (United States)

^b Cornell University   (United States)

Author keywords

EEROM; Flash memory; Hot carriers; Non volatile memory; Semiconductor memories; Tunnel devices effects

Indexed keywords

MEMORY STRUCTURE; SEMICONDUCTOR MEMORIES; TUNNEL DEVICES/EFFECTS;

COMPUTER SIMULATION; ELECTRIC FIELDS; HOT CARRIERS; INSULATING MATERIALS; MONTE CARLO METHODS; RANDOM ACCESS STORAGE;

FLASH MEMORY;

EID: 0142207283     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2002.807383     Document Type: Conference Paper

References (9)

1. S. Aritome, "Advanced flash memory technology and trends for file storage application," in Tech. Dig. IEDM, 2000, p. 763.
2. S. E. Laux, M. V. Fischetti, and D. J. Frank, "Monte Carlo analysis of semiconductor devices: The DAMOCLES program," IBM J. Res. Develop., vol. 34, p. 466, 1990.
3. D. J. Frank, "Monte Carlo simulation of a 30 nm dual-gate MOSFET: How short can Si go?," in Tech. Dig. IEDM, vol. 92, 1992, p. 553.
4. I. C. Yang, C. Vieri, A. Chandrakasan, and D. A. Antoniadis, "Backgated CMOS on SOIAS for dynamic threshold voltage control," IEEE Trans. Electron Devices, vol. 44, p. 822, May 1997.
5. S. Tiwari, P. Solomon, J. J. Welser, E. C. Jones, F. R. McFeely, and E. Cartier, "CMOS and memories: From 100 nm to 10 nm!," Microelectron. Eng., vol. 46, p. 3, 1999.
6. L. Xue and S. Tiwari, "Multi-Layers with Buried Structures (MLBS): An approach to three-dimensional integration," in Tech. Dig. IEEE SOI Conf., 2001, p. 12.
7. J. D. Bude, M. Mastrapasqua, M. R. Pinto, R. W. Gregor, P. J. Kelley, R. A. Kohler, C. W. Leung, Y. Ma, R. J. McPartland, P. K. Roy, and R. Singh, "Secondary electron flash - A high performance low power flash technology for 0.35 μm and below," in Tech. Dig. IEDM, 1997, p. 279.
8. P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Flash Memories. Norwell, MA: Kluwer, 1999, pp. 241-253.
9. M. V. Fischetti and S. E. Laux, "Monte Carlo study of subband-gap impact ionization in small silicon field-effect transistors," in Tech Dig. IEDM, p. 305, 1005.