A new damascene architecture for high-performance metal-insulator-metal capacitors integration

Microelectronic Engineering

Volumn 70, Issue 2-4, 2003, Pages 368-372

  Farcy, A ^a   Torres, J ^a   Arnal, V ^a   Fayolle, M ^b   Feldis, H ^a   Jourdan, F ^b   Assous, M ^b   Di Maria, J L ^b   Vidal, V ^b  

^a STMICROELECTRONICS   (France)

^b CEA LETI   (France)

Author keywords

Damascene architecture; Integrated passive; MIM capacitor; Thin Si 3N4 films

Indexed keywords

CAPACITANCE; CAPACITORS; LEAKAGE CURRENTS; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; SILICON COMPOUNDS; THIN FILMS;

DAMASCENE ARCHITECTURE;

MIM DEVICES;

EID: 0142075266     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9317(03)00468-4     Document Type: Conference Paper

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