-
1
-
-
0031677850
-
A ± 1.5-V 4-MHz CMOS continuous-time filter with a single-integrator based tuning
-
Jan.
-
C. Yoo, S.-W. Lee, and W. Kim, "A ± 1.5-V 4-MHz CMOS continuous-time filter with a single-integrator based tuning," IEEE J. Solid-State Circuits, vol. 33, pp. 18-27, Jan. 1998.
-
(1998)
IEEE J. Solid-state Circuits
, vol.33
, pp. 18-27
-
-
Yoo, C.1
Lee, S.-W.2
Kim, W.3
-
2
-
-
0029406339
-
A 3-V 12-55-MHz BiCMOS pseudodifferential continuous-time filter
-
Nov.
-
F. Rezzi, A. Baschirotto, and R. Castello, "A 3-V 12-55-MHz BiCMOS pseudodifferential continuous-time filter," IEEE Trans. Circuits Syst. I, vol. 42, pp. 896-903, Nov. 1995.
-
(1995)
IEEE Trans. Circuits Syst. I
, vol.42
, pp. 896-903
-
-
Rezzi, F.1
Baschirotto, A.2
Castello, R.3
-
4
-
-
0030105933
-
A low-distortion BiCMOS seven-order bessel filter operating at 2.5 supply
-
Mar.
-
F. Yang and C. C. Enz, "A low-distortion BiCMOS seven-order bessel filter operating at 2.5 supply," IEEE J. Solid-State Circuits, vol. 31, pp. 321-330, Mar. 1996.
-
(1996)
IEEE J. Solid-state Circuits
, vol.31
, pp. 321-330
-
-
Yang, F.1
Enz, C.C.2
-
5
-
-
0038004522
-
A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to gm-C filters
-
July
-
J. A. De Lima and C. Dualibe, "A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to gm-C filters," IEEE Trans. Circuits Syst. II, vol. 48, pp. 649-660, July 2001.
-
(2001)
IEEE Trans. Circuits Syst. II
, vol.48
, pp. 649-660
-
-
De Lima, J.A.1
Dualibe, C.2
-
6
-
-
0022583461
-
CMOS triode transconductor continuous-time filters
-
J. L. Pennock, P. Frith, and R. G. Barker, "CMOS triode transconductor continuous-time filters," in Proc. IEEE Custom Integrated Circuits Conf., 1986, pp. 378-381.
-
(1986)
Proc. IEEE Custom Integrated Circuits Conf.
, pp. 378-381
-
-
Pennock, J.L.1
Frith, P.2
Barker, R.G.3
-
8
-
-
0035016270
-
A 150-MHz continuous-time seventh-order 0.05° equiripple linear phase filter with automatic tuning system
-
May
-
A. Lopez-Martínez, R. Antonio-Chavez, and J. Silva-Martínez, "A 150-MHz continuous-time seventh-order 0.05° equiripple linear phase filter with automatic tuning system," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, May 2001, pp. 156-159.
-
(2001)
Proc. IEEE Int. Symp. Circuits and Systems
, vol.1
, pp. 156-159
-
-
Lopez-Martínez, A.1
Antonio-Chavez, R.2
Silva-Martínez, J.3
-
9
-
-
0003146804
-
A 3-V 10-100-MHz continuous-time seventh-order equiripple linear phase filter
-
Feb.
-
N. Rao, V. Balan, and R. Contreras, "A 3-V 10-100-MHz continuous-time seventh-order equiripple linear phase filter," in IEEE Int. Solid State Circuits Conf. Dig. Tech. Papers, Feb. 1999, pp. 44-45.
-
(1999)
IEEE Int. Solid State Circuits Conf. Dig. Tech. Papers
, pp. 44-45
-
-
Rao, N.1
Balan, V.2
Contreras, R.3
-
10
-
-
0033280922
-
Design considerations and implementation of a programmable high-frequency continuous-time filter and variable-gain amplifier in submicrometer CMOS
-
Dec.
-
V. Gopinathan, M. Tarsia, and D. Choi, "Design considerations and implementation of a programmable high-frequency continuous-time filter and variable-gain amplifier in submicrometer CMOS," IEEE J. Solid-State Circuits, vol. 34, pp. 1698-1707, Dec. 1999.
-
(1999)
IEEE J. Solid-state Circuits
, vol.34
, pp. 1698-1707
-
-
Gopinathan, V.1
Tarsia, M.2
Choi, D.3
-
11
-
-
0035391618
-
An eighth-order CMOS low-pass filter with 30-120-MHz tuning range and programmable boost
-
July
-
G. Bollati, S. Marchese, M. Demicheli, and R. Castello, "An eighth-order CMOS low-pass filter with 30-120-MHz tuning range and programmable boost," IEEE J. Solid-State Circuits, vol. 36, pp. 1056-1066, July 2001.
-
(2001)
IEEE J. Solid-state Circuits
, vol.36
, pp. 1056-1066
-
-
Bollati, G.1
Marchese, S.2
Demicheli, M.3
Castello, R.4
-
12
-
-
0036565035
-
A 200-MHz 7th-order equiripple continuous-time filter by design of nonlinearity suppression in 0.25-μm CMOS process
-
May
-
S. Dosho, T. Morie, and H. Fujiyama, "A 200-MHz 7th-order equiripple continuous-time filter by design of nonlinearity suppression in 0.25-μm CMOS process," IEEE J. Solid-State Circuits, vol. 37, pp. 559-565, May 2002.
-
(2002)
IEEE J. Solid-state Circuits
, vol.37
, pp. 559-565
-
-
Dosho, S.1
Morie, T.2
Fujiyama, H.3
|