A 200-MHz seventh-order equiripple continuous-time filter by design of nonlinearity suppression in 0.25-μm CMOS process

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 5, 2002, Pages 559-565

  Dosho, Shiro ^a   Morie, Takashi ^a   Fujiyama, Hirokuni ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

CMOS; Equiripple filter; Suppression nonlinearity

Indexed keywords

CMOS INTEGRATED CIRCUITS; HARMONIC DISTORTION; INTEGRATED CIRCUIT MANUFACTURE; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; SENSITIVITY ANALYSIS; TRANSCONDUCTANCE; TUNING;

EQUIRIPPLE FILTER; NONLINEARITY SUPPRESSION; OSCILLATOR TUNING METHOD;

ELECTRIC FILTERS;

EID: 0036565035     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.997848     Document Type: Article

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