Josephson-CMOS hybrid memory with ultra-high-speed interface circuit

IEEE Transactions on Applied Superconductivity

Volumn 13, Issue 2 I, 2003, Pages 467-470

  Feng, Y J ^a,b   Meng, X ^a   Whiteley, S R ^a   Van Duzer, T ^a   Fujiwara, K ^c   Miyakawa, H ^c   Yoshikawa, N ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b NANJING UNIVERSITY   (China)

^c YOKOHAMA NATIONAL UNIVERSITY   (Japan)

Author keywords

CMOSFET circuits; Hybrid integrated circuits; Random access memories; Superconducting devices

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK TOPOLOGY; INTERFACES (COMPUTER); SIGNAL PROCESSING;

INTERFACE CIRCUITS;

JOSEPHSON JUNCTION DEVICES;

EID: 0042442295     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2003.813902     Document Type: Conference Paper

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