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Volumn 24, Issue 8, 2003, Pages 518-520

A 2-bit MONOS nonvolatile memory cell based on asymmetric double gate MOSFET structure

Author keywords

Asymmetric double gate MOSFET; Channel hot electron injection; FN tunneling; MONOS; Nonvolatile memory

Indexed keywords

COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; DIELECTRIC MATERIALS; ELECTRON TUNNELING; FLASH MEMORY; GATES (TRANSISTOR); MOSFET DEVICES; POLYSILICON; SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0042387925     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2003.815157     Document Type: Article
Times cited : (16)

References (10)
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    • 0042060128 scopus 로고    scopus 로고
    • Improvement in retention reliability of SONOS nonvolatile memory devices by two-step high temperature deuterium anneals
    • J. Bu and M. H. White, "Improvement in retention reliability of SONOS nonvolatile memory devices by two-step high temperature deuterium anneals," in Proc. 39th Annu. IEEE Int. Reliability Physics Symp., 2001, pp. 52-56.
    • Proc. 39th Annu. IEEE Int. Reliability Physics Symp., 2001 , pp. 52-56
    • Bu, J.1    White, M.H.2
  • 6
    • 4243216494 scopus 로고    scopus 로고
    • T asymmetric-gate FinFET devices
    • T asymmetric-gate FinFET devices," in IEDM Tech. Dig., 2001, pp. 19.5.1-19.5.4.
    • (2001) IEDM Tech. Dig.
    • Kedzierski, J.1
  • 7
    • 0021483045 scopus 로고
    • A lucky-electron model for channel hot-electron injection in MOSFET's
    • Sept.
    • S. Tam, P. K. Ko, and C. Hu, "A lucky-electron model for channel hot-electron injection in MOSFET's," IEEE Trans. Electron Devices, vol. ED-31, p. 1116, Sept. 1984.
    • (1984) IEEE Trans. Electron Devices , vol.ED-31 , pp. 1116
    • Tam, S.1    Ko, P.K.2    Hu, C.3
  • 8
    • 0036923647 scopus 로고    scopus 로고
    • An embedded 90 nm SONOS nonvolatile memory utilizing hot electron programming and uniform tunnel erase
    • C. T. Swift et al., "An embedded 90 nm SONOS nonvolatile memory utilizing hot electron programming and uniform tunnel erase," in IEDM Tech. Dig., 2002, pp. 927-930.
    • (2002) IEDM Tech. Dig. , pp. 927-930
    • Swift, C.T.1
  • 9
    • 0034315780 scopus 로고    scopus 로고
    • NROM: A novel localized trapping, 2-bits nonvolatile memory cell
    • Nov.
    • B. Eitan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi, "NROM: A novel localized trapping, 2-bits nonvolatile memory cell," IEEE Electron Device Lett., vol. 21, pp. 543-545, Nov. 2000.
    • (2000) IEEE Electron Device Lett. , vol.21 , pp. 543-545
    • Eitan, B.1    Bloom, I.2    Aloni, E.3    Frommer, A.4    Finzi, D.5
  • 10
    • 0030291637 scopus 로고    scopus 로고
    • 2 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications
    • Nov.
    • 2 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications," IEEE J. Solid-State Circuits, vol. 31, pp. 1575-1583, Nov. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 1575-1583
    • Jung, T.-S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.