Multilevel-cell 32Mb flash memory

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 2000, Pages 367-368

  Bauer, M ^a   Alexis, R ^a   Atwood, G ^a   Baltar, B ^a   Fazio, A ^a   Frary, K ^a   Hensel, M ^a   Ishac, M ^a   Javanifard, J ^a   Landgraf, M ^a   Leak, D ^a   Loe, K ^a   Mills, D ^a   Ruby, P ^a   Rozman, R ^a   et al , ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; AMPLIFIERS (ELECTRONIC); DATA PROCESSING; LOGIC CIRCUITS; STORAGE ALLOCATION (COMPUTER); THRESHOLD VOLTAGE;

BINARY SEARCH SENSING SCHEME; FLASH MEMORY; STORAGE CAPACITY;

DATA STORAGE EQUIPMENT;

EID: 0033724126     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)