Nanocell logic gates for molecular computing

IEEE Transactions on Nanotechnology

Volumn 1, Issue 2, 2002, Pages 100-108

  Tour, James M ^a,c,d   Van Zandt, William L ^a   Husband, Christopher P ^a   Husband, Summer M ^a   Wilson, Lauren S ^a   Franzon, Paul D ^b   Nackashi, David P ^b  

^a RICE UNIVERSITY   (United States)

^b NORTH CAROLINA STATE UNIVERSITY   (United States)

^c Department of Chemistry ^*  (United States)

^d Molecular Electronics Corporation   (United States)

Author keywords

Circuit simulation; Genetic algorithms; Logic circuit fault tolerance; Logic devices; Molecular electronics

Indexed keywords

CIRCUIT SIMULATIONS; LOGIC CIRCUIT FAULT TOLERANCES; MOLECULAR ELECTRONICS; MOLECULAR SWITCHES;

COMPUTATION THEORY; COMPUTER SIMULATION; GENETIC ALGORITHMS; LARGE SCALE SYSTEMS; LOGIC DEVICES; TOPOLOGY;

GATES (TRANSISTOR);

EID: 0042038747     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2002.804744     Document Type: Article

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