Novel process for vertical double-gate (DG) metal-oxide-semiconductor field-effect-transistor (MOSFET) fabrication

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 42, Issue 6 B, 2003, Pages 4138-4141

  Masahara, Meishoku ^a   Matsukawa, Takashi ^a   Tanoue, Hisao ^a   Ishii, Kenichi ^a   Liu, Yongxun ^a   Sakamoto, Kunihiro ^a   Kanemaru, Seigo ^a   Suzuki, Eiichi ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

Etchback; Ion bombardment retarded etching; Orientation dependent wet etching; Planarization; SI wall; Symmetrical double side gate; TMAH; Vertical DG MOSFET

Indexed keywords

ELECTRON BEAMS; ETCHING; GATES (TRANSISTOR); ION BOMBARDMENT; SEMICONDUCTOR DEVICE MANUFACTURE;

ETCHBACK PROCESS;

MOSFET DEVICES;

EID: 0041861189     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.42.4138     Document Type: Conference Paper

References (20)

1. T. Sekigawa and Y. Hayashi: Solid-State Electron. 27 (1984) 827.
2. H.-S. P. Wong, K. K. Chan and Y. Taur: Tech. Dig. Int. Electron Device Meet. (1997) p. 427.
3. C. P. Auth and J. D. Plummer: IEEE Trans. Electron Devices 45 (1998) 2381.
4. T. Schulz, W. Roesner, L. Risch and U. Langmann: Tech. Dig. Int. Electron Device Meet. (2000) p. 61.
5. E. Josse, T. Skotnicki, M. Jurczak, M. Paoli, B. Tormen, D. Dutartre, P. Ribot, A. Villaret and E. Sondergard: Tech. Dig. Symp. VLSI Technology (2001) p. 55.
6. M. Masahara, T. Matsukawa, K. Ishii, Y. Liu, M. Nagao, H. Tanoue, T. Tanii, I. Ohdomari, S. Kanemaru and E. Suzuki: Ext. Abstr. Int. Conf. Solid State Devices and Materials (Business Center for Academic Societies Japan, Tokyo, 2002) p. 426.
7. U. F. Gianola: J. Appl. Phys. 28 (1957) 868.
8. J. F. Gibbons, E. O. Hechtl and T. Tsurushima: Appl. Phys. Lett. 15 (1969) 117.
9. K. Moriwaki, N. Masuda, H. Aritome and S. Namba: Jpn, J. Appl. Phys. 19 (1980) 491.
10. M. Komuro, H. Hiroshima, H. Tanoue and T. Kanayama: J. Vac. Sci. & Technol. B1 (1983) 985.
11. K. E. Petersen: Proc. IEEE 70 (1982) 420.
12. ATHENA User's Manual, SILVACO Int'l Inc. 1996.
13. G. Deamaley, J. H. Freeman, R. S. Nelson and J. Stephen: Defects in Crystalline Solids, eds. S. Amelinckx, R. Gevers and J. Nihoul (North-Holland Publishing Company, Amsterdam, 1973) Vol. 8, p. 154.
14. H. Seidel, L. Csepregi, A. Heuberger and H. Baumgaertel: J. Electrochem. Soc. 137 (1990) 3626.
15. Y. Nemirovsky and A. El-Bahar: Sens. & Actual. A75 (1999) 205.
16. O. Tabata, R. Asahi, H. Funabashi, K. Shimaoka and S. Sugiyama: Sens. & Actual. 34 (1992) 51.
17. A. Merlos, M. Acero, M. H. Bao, J. Bausells and J. Esteve: Sens. & Actual. A37 (1993) 737.
18. E. Steinsland, M. Nese, A. Hanneborg, R. W. Bernstein, H. Sandmo and G. Kittilsland: Sens. & Actual. A54 (1996) 728.
19. S. Ogura, P. J. Tsang, W. W. Walker, D. L. Critchlow and J. F. Shepard: Tech. Dig. Int. Electron Device Meet. (1981) p. 651.
20. R. Liu: ULSI Technology, ed. C. Y. Chang and S. M. Sze (McGraw-Hill, New York, 1996) p. 424.