Substrate loss mechanisms for microstrip and CPW transmission lines on lossy silicon wafers

Solid-State Electronics

Volumn 47, Issue 11, 2003, Pages 1927-1936

  Lederer, Dimitri ^a   Raskin, Jean Pierre ^a  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

CPW; Interface traps; Microstrip lines; Oxide charges; RF losses

Indexed keywords

ELECTRIC CONDUCTIVITY; ELECTRIC LINES; INTERFACES (MATERIALS); SILICON WAFERS;

INTERFACE TRAPS;

MICROSTRIP DEVICES;

EID: 0041728808     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(03)00253-3     Document Type: Article

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