Modeling the substrate effect in interconnect line characteristics of high-speed VLSI circuits

IEEE Transactions on Microwave Theory and Techniques

Volumn 46, Issue 10 PART 1, 1998, Pages 1436-1443

  Wee, Jae Kyung ^a,b   Park, Young June ^a,b,e,f   Min, Hong Shick ^a,d,e,f   Cho, Dae Hyung ^a,b,c,d,e,f   Seung, Man Ho ^a,b,c   Park, Hun Sup ^a,b,c,d,e,f  

^a IEEE   (South Korea)

^b Seoul National University   (South Korea)

^c Hynix Semiconductor Inc   (South Korea)

^d School of Electrical Engineering and ISRC   (South Korea)

^e INTEL CORPORATION   (United States)

^f Advanced Device Physics Laboratory   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001605883     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/22.721145     Document Type: Article

References (11)

1. D. C. Edelstein, G. A. Sai-Halasz, and Y.-J. Mii, VLSI on-chip interconnection performance simulations and measurements, IBM J. Res. Develop., vol. 39, pp. 383-401, July 1995.
2. E. Groteluschen, L. S. Dutta, and S. Zaage, Quasi-analytical analysis of the broad-band properties of multiconductor transmission lines on semiconducting substrates, IEEE Trans. Comp., Packag., Manufact. Technol, B, vol. 17, pp. 376-382, Aug. 1994.
3. S. Zaage and E. Groteluschen, Characterization of the broad-band transmission behavior of interconnections on silicon substrates, in Proc. IEEE Int. Conf. WSI, San Francisco, CA, pp. 268-278, Jan. 1993.
4. Y. R. Kwon, V. M. Hietala, and K. S. Champlin, Quasi-TEM analysis of slow-wave mode propagation on coplanar microstructure MIS transmission lines, IEEE Trans. Microwave Theory Tech., vol. MTT-35, pp. 545-551, June 1987.
5. T. Shibata and E. Sano, Characterization of MIS structure coplanar transmission lines for investigation of signal propagation in integrated circuits, IEEE Trans. Microwave Theory Tech., vol. 38, pp. 881-890, July 1990.
6. J. D. Jackson, Classical Electrodynamics. New York: Wiley, 1962.
7. Y. Eo and W. R. Eisenstadt, High speed VLSI interconnection lines and packages in high speed integrated circuits, IEEE Trans. Comp., Packag., Manufact. Technol. B, vol. 16, pp. 552-562, Aug. 1993.
8. D. H. Cho, Y. S. Eo, M. H. Seung, N. H. Kirn, J. K. Kwon, and H. S. Park, Interconnect capacitance, crosstalk, and signal delay for 0.35 ftm CMOS technology, 1in IEDM'96, San Francisco, CA, Dec. 1996, pp. 619-622.
9. D. Jager, Slow-wave propagating along variable Schottky-contact microstrip line, IEEE Trans. Microwave Theory Tech., vol. MTT-24, pp. 566-573, Sept. 1976.
10. F. W. Grover, Inductance Calculations Working Formulas and Tables. New York: Dover, 1962.
11. E. Barke, Line-to-ground capacitance calculation for VLSI: A comparison, IEEE Trans. Computer-Aided Design, vol. 7, pp. 295-298, Feb. 1988.