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Volumn , Issue , 2003, Pages 806-811

Dynamic global buffer planning optimization based on detail block locating and congestion analysis

Author keywords

Buffer Insertion; Congestion; Floorplanning; Routability

Indexed keywords

ALGORITHMS; BLOCK CODES; CONGESTION CONTROL (COMMUNICATION); ITERATIVE METHODS; OPTIMIZATION; PROBLEM SOLVING;

EID: 0041633573     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/776033.776036     Document Type: Conference Paper
Times cited : (19)

References (13)
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    • Cong, J.1    Kong, T.2    Pan, D.Z.3
  • 3
    • 0033723975 scopus 로고    scopus 로고
    • Routability-driven repeater block planning for interconnectcentric floorplanning
    • P. Sarkar, V. Sundararaman, and C. K. Koh. Routability-driven repeater block planning for interconnectcentric floorplanning. In ISPD 2000.
    • ISPD 2000
    • Sarkar, P.1    Sundararaman, V.2    Koh, C.K.3
  • 4
    • 0033692223 scopus 로고    scopus 로고
    • Planning buffer locations by network flows
    • X. P. Tang and D. Wong. "Planning buffer locations by network flows". In Intl. Symp. Physical Design, pages 186-191, 2000.
    • (2000) Intl. Symp. Physical Design , pp. 186-191
    • Tang, X.P.1    Wong, D.2
  • 5
    • 0030697661 scopus 로고    scopus 로고
    • Wire segmenting for improved buffer insertion
    • June
    • C. J. Alpert and A. Devgan, "Wire segmenting for improved buffer insertion,"in Proc. Design Automation Conf., June 1997, pp. 588-593.
    • (1997) Proc. Design Automation Conf. , pp. 588-593
    • Alpert, C.J.1    Devgan, A.2
  • 6
    • 85088178131 scopus 로고    scopus 로고
    • Routibility driven floorplanner with buffer block planning
    • C.W.Sham, F.Y.Young "Routibility driven floorplanner with buffer block planning", In ISPD'2002
    • ISPD'2002
    • Sham, C.W.1    Young, F.Y.2
  • 7
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    • The transient response of damped linear networks with particular regard to wide-band amplifiers
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    • W. C. Elmore, "The transient response of damped linear networks with particular regard to wide-band amplifiers," J. Appl. Phys., vol. 19, pp.55-63, Jan. 1948.
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    • Elmore, W.C.1
  • 8
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    • Interconnect delay estimation models for synthesis and design planning
    • Jan.
    • J. Cong and D. Z. Pan, "Interconnect delay estimation models for synthesis and design planning," in Proc. ASP Design Automation Conf., Jan. 1999, pp. 97-100.
    • (1999) Proc. ASP Design Automation Conf. , pp. 97-100
    • Cong, J.1    Pan, D.Z.2
  • 11
    • 0034481271 scopus 로고    scopus 로고
    • Corner block list: An effective and efficient topological representation of non-slicing floorplan
    • Hong Xianlong, Huang Gang et al. "Corner Block List: An Effective and Efficient Topological Representation of Non-slicing Floorplan" ICCAD'2000.pp.8-12.
    • (2000) ICCAD , pp. 8-12
    • Xianlong, H.1    Gang, H.2
  • 12
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    • An integrated floorplanning with an efficient buffer planning algorithm
    • in press
    • Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen etc An Integrated Floorplanning with an Efficient Buffer Planning Algorithm" ISPD2003 (in press)
    • ISPD2003
    • Ma, Y.1    Hong, X.2    Dong, S.3    Chen, S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.