Planning buffer locations by network flows

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2000, Pages 180-185

  Tang, Xiaoping ^a   Wong, D F ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; POLYNOMIALS; PROBLEM SOLVING; VLSI CIRCUITS;

POLYNOMIAL-TIME OPTIMAL ALGORITHMS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033692223     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/332357.332397     Document Type: Conference Paper

References (15)