'3-dimensional' TEM silicon-device analysis by combining plan-view and FIB sample preparation

Materials Science and Engineering: B

Volumn 102, Issue 1-3, 2003, Pages 63-69

  De Veirman, A E M ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

Crystal defects; Focused ion beam technique; IC processing; Specimen preparation techniques; Transmission electron microscopy

Indexed keywords

CRYSTAL DEFECTS; INTEGRATED CIRCUITS; ION BEAMS; SEMICONDUCTOR MATERIALS; SYNTHESIS (CHEMICAL); TRANSMISSION ELECTRON MICROSCOPY;

SEMICONDUCTOR INDUSTRY;

SILICON;

EID: 0041511729     PISSN: 09215107     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0921-5107(02)00629-3     Document Type: Conference Paper

References (10)

1. Kolbesen B.O. Semiconductors and semiconductor devices. Amelinckx S., Van Dyck D., Van Landuyt J., Van Tendeloo G. Handbook of Microscopy, Applications. 1997;145-205 VCH, Weinheim.
2. Fahey P.M., Mader S.R., Stiffler S.R., Mohler R.L., Mis J.D., Slinkman J.A. Stress-induced dislocations in silicon integrated circuits. IBM J. Res. Develop. 36:1992;158-182.
3. S. Morris, S. Tatti, E. Black, N. Dickson, H. Mendez, B. Schwiesow, R. Pyle, A Technique for Preparing TEM Cross-sections to a Specific Area Using the FIB, Proceedings of ISTFA, 1991, pp. 417-427.
4. Anderson R., Klepeis S., Benedict J., Vandygrift W.G., Orndorff M. Recent developments in the preparation of semiconductor device materials for the transmission electron microscopy. Inst. Phys. Conf. Ser. 100:1989;491-500.
5. Gianuzzi L.A., Drown J.L., Brown S.R., Irwin R.B., Stevie F.A. Focused ion beam milling and micromanipulation lift-out for site specific cross-section TEM specimen preparation. Mater. Res. Soc. Symp. Proc. 480:1997;19-27.
6. T. Ohnishi, H. Koike, T. Ishitani, S. Tomimatsu, K. Umemura, T. Kamino, A New Focused-Ion-Beam Microsampling Technique for TEM Observation of Site-specific Area's, Proceedings ISTFA, 1999, pp. 449-453.
7. H. Roberts, B. Otterloo, FIB-TEM Sample preparation by In-situ Lift Out Technique, presented at EFUG 2001, www.imec.be/efug.
8. Armigliato A., Balboni R., Balboni S., Frabboni S., Tixier A., Carnevale G.P., Colpani P., Pavia G., Marmiroli A. TEM/CBED determination of strain in silicon-based submicrometric electronic devices. Micron. 31:2000;203-209.
9. Cerva H., Bergholz W. Implantation defects below mask edges in silicon. J. Electrochem. Soc. 140:1993;780-786.
10. Iyer S.S., Patton G.L., Stork J.M.C., Meyerson B.S., Harame D.L. Heterojunction bipolar transistors using Si-Ge Alloys. Trans. Electron Dev. 36:1989;2043-2064.