CMOS microsystem front-end for microTesla resolution magnetic field measurement

Analog Integrated Circuits and Signal Processing

Volumn 36, Issue 1-2, 2003, Pages 165-174

  Frick, V ^a   Hebrard, L ^a   Poure, P ^a   Braun, F ^a  

^a UNIVERSITÉ DE STRASBOURG   (France)

Author keywords

Hall effect generators; Low noise design; Magnetic field sensor; Microsystems; Submicronic standard CMOS process

Indexed keywords

CMOS INTEGRATED CIRCUITS; HALL EFFECT DEVICES; LINEAR INTEGRATED CIRCUITS; MAGNETIC FIELD MEASUREMENT; MONOLITHIC INTEGRATED CIRCUITS; SENSORS;

ANALOG CONDITIONING ELECTRONICS; LOW NOISE DESIGN; MICROTESLA RESOLUTION MAGNETIC FIELD MEASUREMENT; MONOLITHIC MICROSYSTEM;

MICROELECTRONICS;

EID: 0041347980     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1024426420583     Document Type: Article

References (15)

1. R. S. Popovic, J. A. Flanagan, and P. A. Besse, "The future of magnetic sensors." Sensors and Actuators A56, pp. 39-55, 1996.
2. H. P. Baltes and R. S. Popovic, "Integrated semiconductor magnetic field sensors." Proceedings of the IEEE 74(8), pp. 1107-1132, 1986.
3. P. Munter, "A low offset spinning-current Hall plate," in Proceedings of 5th International Conference on Solid-State Sensors and Actuators 1989, pp. 430-434.
4. R. S. Popovic, Z. B. Randjelovic, and D. Manic, "Integrated hall effect magnetic sensors." Sensors and Actuators A91, pp. 46-50, 2001.
5. Z. B. Randjelovic, M. Kayal, R. S. Popovic, and H. Blanchard, "Highly sensitive hall magnetic sensors microsystem in CMOS technology." IEEE Journal of Solid State Circuits 37(2), pp. 151-159, 2002.
6. V. Frick, L. Hébrard, P. Poure, F. Anstotz, and F. Braun, "CMOS microsystem for AC current measurement with galvanic isolation," in 1st IEEE Sensors Conference, pp. 1145-1150, Orlando, Paper No. 40.2, June 2002, Invited Paper.
7. V. Frick, L. Hébrard, P. Poure, and F. Braun, "Design, characterisation, modelling and performances of magnetic sensors in standard CMOS technology," in Proceedings of DCIS'2000 Conference, 2000, pp. 129-132.
8. S. M. Sze, Semiconductor Devices. John Wiley, Chap. 5, New York, 1985.
9. Y. P. Tsividis, Operation and Modeling of the MOS Transistor. McGraw-Hill, 1988.
10. F. N. Hooge, "1/f noise sources." IEEE Transaction on Electron Devices 41 (11), pp. 1926-1935, 1994.
11. L. K. J. Vandamme, "Bulk and 1/f noise." IEEE Transaction on Electron Devices 36(5), pp. 987-992, 1989.
12. G. Palmisano, G. Palumbo, and S. Pennisi, "Design procedure for two-stage CMOS transconductance operational amplifiers: A tutorial." Journal of Analog Integrated Circuits and Signal Processing 27, pp. 179-189, 2001.
13. K. R. Laker and W. M. C. Sansen, Design of Analog Integrated Circuits. McGraw-Hill, 1994.
14. G. A. Rincon-More, "Active capacitor multiplier in miller compensated Circuits." IEEE Journal of Solid State Circuits 3, pp. 26-325, 2000.
15. J. B. Kammerer, L. Hébrard, V. Frick, P. Poure, and F. Braun, "Design and modelling of a voltage controlled N-well resistor using the MOS tunneling diode structure," in IEEE ICECS'2002 Conference, Croatia, 15-18 Sept. 2002, pp. 129-132.