Time evolution of temperature distribution of a flip-chip no-flow underfill package during solder reflow process

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2003, Pages 443-448

  Zhang, Zhuqing ^a   Vorakunpinij, Adisak ^b   Sitaraman, Suresh K ^c   Wong, C P ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FINITE ELEMENT METHOD; FLIP CHIP DEVICES; ITERATIVE METHODS; MATHEMATICAL MODELS; TEMPERATURE DISTRIBUTION;

FLIP CHIP PACKAGE; SOLDER JOINT RELIABILITY; SOLDER REFLOW PROCESS; THERMOMECHANICAL STRESS;

ELECTRONICS PACKAGING;

EID: 0038012791     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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