2.5 Gbit/s CMOS transimpedance amplifier for optical communication applications

Electronics Letters

Volumn 39, Issue 2, 2003, Pages 211-212

  Park, Sung Min ^a   Yoo, Hoi Jun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; EQUIVALENT CIRCUITS; OPTICAL COMMUNICATION; PHOTOCURRENTS; PHOTODIODES;

CMOS TRANSIMPEDANCE AMPLIFIER; PARASITIC CAPACITANCE; PARASITIC RESISTANCE; REGULATED CASCODE CIRCUIT;

AMPLIFIERS (ELECTRONIC);

EID: 0037461918     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20030142     Document Type: Article

References (4)

1. Petersen, A.K., Kiziloglu, K., Yoon, T., Williams, JR., F., and Sandor, M.R., 'Front-end CMOS chipset for 10 Gb/s communication', IEEE RFIC Dig. Pap., Seattle, WA, USA, 2002, pp. 93-96
2. Oh, Y.-H., Lee, S.-G., and Park, H.-H. 'A 2.5 Gb/s CMOS transimpedance amplifier using novel active inductor load', Proc. European Solid-State Circuit Conf., Villach, Austria, 2001, pp. 196-199
3. Park, S.M., and Toumazou, C.; 'A packaged low poise high-speed regulated cascode transimpedance amplifier using 0.6 μm N-well CMOS technology'. Proc. European Solid-State Circuit Conf., Stockholm, Sweden, 2000, pp. 432-435
4. Lee, J., Song, S.-J., Park, S.M., Nam, C.-M., Kwon, Y.-S. and Yoo, H.-J.: 'A multichip on oxide 1 Gb/s 80 dBΩ fully-differential CMOS transimpedance amplifier for optical interconnect applications', IEEE ISSCC Dig. Tech. Pap., San Francisco, CA, USA, 2002, pp. 80-81