A packaged low-noise high-speed regulated cascode transimpedance amplifier using a 0.6μm N-well CMOS technology

European Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 431-434

  Park, Sung Min ^a   Toumazou, C ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMMON-GATE TRANSISTOR; INPUT RESISTANCE; LOW INPUT IMPEDANCE; MEASURED RESULTS; PARASITIC CAPACITANCE; REGULATED CASCODE; TRANS-IMPEDANCE GAIN; TRANSIMPEDANCE AMPLIFIERS;

CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; ELECTRIC IMPEDANCE MEASUREMENT; FIELD EFFECT TRANSISTORS; SPECTRAL DENSITY;

DIFFERENTIAL AMPLIFIERS;

EID: 84893778209     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. E. Säckinger and W. Guggenbühl, "A High-Swing, High-Impedance MOS Cascade Circuit", IEEE J. of Solid-State Circuits, vol. 25, No. 1, pp 289-298, Feb. 1990.
2. M. Helfenstein et al., "90dB, 90MHz, 30mW OTA with the Gain-Enhancement Implemented by One-and Two-Stage Amplifiers", Proc. IEEE ISCAS'95, Vol. 3, pp 1732-1735, 1995.
3. S. M. Park and C. Toumazou, "Giga-hertz Low Noise CMOS Transimpedance Amplifier", Proc. IEEE ISCAS'97, vol.1, pp 209-212, 1997