VLSI architectures for high-speed MAP decoders

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2001, Pages 446-453

  Worm, Alexander ^a   Lamm, Holger ^a   Wehn, Norbert ^a  

^a France   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BIT ERROR RATE; COMMUNICATION SYSTEMS; ERROR CORRECTION; OPTIMIZATION; VLSI CIRCUITS;

MAXIMUM A POSTERIORI (MAP) ALGORITHM;

DECODING;

EID: 0034998342     PISSN: 10639667     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICVD.2001.902698     Document Type: Article

References (0)