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Volumn , Issue , 1999, Pages 182-183

VLSI implementation considerations for turbo decoding using a low latency log-MAP

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BIT ERROR RATE; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; PROBABILITY; SIGNAL TO NOISE RATIO; VLSI CIRCUITS;

EID: 0033329774     PISSN: 0747668X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icce.1999.785223     Document Type: Conference Paper
Times cited : (6)

References (9)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.