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Volumn 50, Issue 1, 2003, Pages 106-110

Modeling of the bulk versus SOI CMOS performances for the optimal design of APS circuits in low-power low-voltage applications

Author keywords

Active pixel sensors (APSs); CMOS analog integrated circuits; CMOS image sensors; Image sensors; Integrated circuits; Silicon on insulator (SOI); SOI CMOS image sensors

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; OPTIMIZATION; SIGNAL TO NOISE RATIO; SILICON ON INSULATOR TECHNOLOGY; THERMAL NOISE;

EID: 0037251386     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.806957     Document Type: Article
Times cited : (14)

References (10)
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  • 3
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  • 6
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.