RF characterisation of fully depleted SOI MOSFET with Si substrate removed

Electronics Letters

Volumn 38, Issue 5, 2002, Pages 256-257

  Chen, C L ^a   Burns, J A ^a   Warner, K ^a   Beard, W T ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; SPURIOUS SIGNAL NOISE; SUBSTRATES;

RADIO FREQUENCY (RF) CIRCUITS;

MOSFET DEVICES;

EID: 0037186016     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20020167     Document Type: Article

References (5)

1. Three-dimensional integrated circuits for low-power, high-bandwidth systems on a chip
2. Thin silicide development for fully-depleted SOI CMOS technology
3. Characterization of fully depleted SOI transistors after removal of the silicon substrate
4. A 427 mW 20% compact W-band InP HEMT MMIC power amplifier
5. Impact of interconnect capacitance reduction on RF-Si device performance