BIST scheme for DAC testing

Electronics Letters

Volumn 38, Issue 15, 2002, Pages 776-777

  Chang, S J ^a   Lee, C L ^a   Chen, J E ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b CHUNG HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; DIGITAL CIRCUITS; ELECTRIC POTENTIAL; FREQUENCIES; SIGNAL ENCODING; SIGNAL FILTERING AND PREDICTION; SPURIOUS SIGNAL NOISE; VARIABLE FREQUENCY OSCILLATORS;

DIFFERENTIAL NONLINEARITY; DIGITAL CODES; GAIN ERROR; INTEGRAL NONLINEARITY; OFFSET ERROR;

DIGITAL TO ANALOG CONVERSION;

EID: 0037130415     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20020530     Document Type: Article

References (5)

1. BIST for D/A and A/D converters
2. BIST structure for DAC testing
3. A BIST scheme for on-chip ADC and DAC testing
4. HABIST: Histogram-based analog built in self test
5. VCO linearisation by frequency feedback