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Volumn 38, Issue 19, 2002, Pages 1081-1083

48 Gbit/s InP DHBT MS-DFF with very low time jitter

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN; ELECTRIC CLOCKS; ELECTRONICS PACKAGING; HETEROJUNCTION BIPOLAR TRANSISTORS; INTEGRATED CIRCUITS; SEMICONDUCTING INDIUM COMPOUNDS; TIMING JITTER;

EID: 0037068729     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20020777     Document Type: Article
Times cited : (6)

References (7)
  • 2
    • 0032646258 scopus 로고    scopus 로고
    • 45 Gbit/s decision IC module using InAlAs/InGaAs/InP HEMTs
    • MURATA, K., OTSUJI, T., and YAMANE, Y.: '45 Gbit/s decision IC module using InAlAs/InGaAs/InP HEMTs', Electron. Lett., 1999, 35, (16), pp. 1379-1380.
    • (1999) Electron. Lett. , vol.35 , Issue.16 , pp. 1379-1380
    • Murata, K.1    Otsuji, T.2    Yamane, Y.3
  • 3
    • 0032687272 scopus 로고    scopus 로고
    • 40 Gbit/s decision IC using InP/InGaAs composite-collector heterojunction bipolar transistors
    • SANO, E., NAKAJIMA, H., WATANABE, N., and YAMAHATA, S.: '40 Gbit/s decision IC using InP/InGaAs composite-collector heterojunction bipolar transistors', Electron. Lett., 1999, 35, (14), pp. 1194-1195.
    • (1999) Electron. Lett. , vol.35 , Issue.14 , pp. 1194-1195
    • Sano, E.1    Nakajima, H.2    Watanabe, N.3    Yamahata, S.4
  • 4
    • 0037187734 scopus 로고    scopus 로고
    • 40 Gbit/s master-slave D-type flip-flop in InP DHBT technology
    • KASBARI, A., ANDRÉ, PH., GODIN, J., and KONCZYKOWSKA, A.: '40 Gbit/s master-slave D-type flip-flop in InP DHBT technology', Electron. Lett., 2002, 38, (7), pp. 330-331.
    • (2002) Electron. Lett. , vol.38 , Issue.7 , pp. 330-331
    • Kasbari, A.1    André, Ph.2    Godin, J.3    Konczykowska, A.4
  • 5
    • 0037030552 scopus 로고    scopus 로고
    • High-input-sensitivity, low-power 43 Gbit/s decision circuit using InP/InGaAs DHBTs
    • ISHII, K., NOSAKA, H., IDA, M., KURISHIMA, K., ENOKI, T., SHIBATA, T., and SANO, E.: 'High-input-sensitivity, low-power 43 Gbit/s decision circuit using InP/InGaAs DHBTs', Electron. Lett., 2002, 38, (12), pp. 557-558.
    • (2002) Electron. Lett. , vol.38 , Issue.12 , pp. 557-558
    • Ishii, K.1    Nosaka, H.2    Ida, M.3    Kurishima, K.4    Enoki, T.5    Shibata, T.6    Sano, E.7
  • 7
    • 0029221237 scopus 로고
    • Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops
    • ISHII, K., ICHINO, H., TOGASHI, M., KOBAYASHI, Y., and YAMAGUCHI, C.: 'Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops', IEEE J. Solid-State Circuits, 1995, 30, (1), pp. 19-24.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , Issue.1 , pp. 19-24
    • Ishii, K.1    Ichino, H.2    Togashi, M.3    Kobayashi, Y.4    Yamaguchi, C.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.