40 Gbit/s master-slave D-type flip-flop in InP DHBT technology

Electronics Letters

Volumn 38, Issue 7, 2002, Pages 330-331

  Kasbari, A ^a   Andre Ph ^a   Godin, J ^a   Konczykowska, A ^a  

^a OPTO+   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CURRENT DENSITY; ELECTRIC BREAKDOWN; ELECTRIC INDUCTORS; FLIP FLOP CIRCUITS; FREQUENCY SYNTHESIZERS; HETEROJUNCTION BIPOLAR TRANSISTORS; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; JITTER; RESISTORS; SEMICONDUCTING INDIUM PHOSPHIDE;

MASTER SLAVE FLIP FLOP; ON WAFER MEASUREMENT; PSEUDORANDOM BIT PATTERN GENERATOR;

TIME DIVISION MULTIPLEXING;

EID: 0037187734     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20020241     Document Type: Article

References (6)

1. A 40 GHz D-type flip-flop using AlGaAs/GaAs HBT's
2. InP heterojunction bipolar transistor decision circuits
3. 40 Gbit/s decision IC using InP/InGaAs composite-collector heterojunction bipolar transistors
4. 45 Gbit/s decision IC module using InAlAs/InGaAs/InP HEMTs
5. Lateral design of InP/InGaAs DHBTs for 40 Gbit/s ICs
6. InP HBT driver circuit optimization for high-speed ETDM transmission