A novel approach to multiple constant multiplication using minimum spanning trees

Midwest Symposium on Circuits and Systems

Volumn 3, Issue , 2002, Pages

  Gustafsson, Oscar ^a   Wanhammar, Lars ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; DIGITAL ARITHMETIC; HEURISTIC METHODS; MULTIPLYING CIRCUITS; TREES (MATHEMATICS);

MULTIPLE CONSTANT MULTIPLICATION (MCM);

DIGITAL SIGNAL PROCESSING;

EID: 0036979363     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

1. D. R. Bull and D. H. Horrocks, "Primitive operator digital filters," IEE Proc. G, vol. 138, pp. 401-412, June 1991.
2. A. G. Dempster and M. D. Macleod, "Use of minimum-adder multiplier blocks in FIR digital filters," IEEE Trans. Circuits Syst. II, vol. 42, pp. 569-577, Sept. 1995.
3. M. Mehendale, S. D. Sherlakar, and G. Vekantesh, "Synthesis of multiplierless FIR filters with minimum number of additions," Proc. IEEE/ACM Int. Conf. Computer-Aided Design, Los Alamitos, CA, 1995, pp. 668-671.
4. M. Potkonjak, M. B. Shrivasta, and A. P. Chandrakasan, "Multiple constant multiplication: Efficient and versatile framework and algorithms for exploring common subexpression elimination," IEEE Trans. Computer-Aided Design, vol. 15, pp. 151-161, Feb. 1996.
5. R. I. Hartley, "Subexpression sharing in filters using canonic signed digit multipliers," IEEE Trans. Circuits Syst. II, vol. 43, pp.677-688, Oct. 1996.
6. R. Pasko, P. Schaumont, V. Derudder, S. Vernalde, and D. Durackova, "A new algorithm for elimination of common subexpressions," IEEE Trans. Computer-Aided Design, vol. 18, pp. 58-68, Jan. 1999.
7. A. Yurdakul and G. Dündar, "Multiplierless realization of linear DSP transforms by using common two-term expressions," J. VLSI Signal Processing, vol. 22, pp. 163-172, Sept. 1999.
8. O. Gustafsson and L. Wanhammar, "ILP modelling of the common subexpression sharing problem," Proc. IEEE Conf. Elec. Circuits Syst., Dubrovnik, Croatia, Sept. 12-15, 2002.
9. A. G. Dempster and M. D. Macleod, "Constant integer multiplication using minimum adders," IEE Proc. Circuits Devices Syst., vol. 141, no. 6, pp. 407-413, Oct. 1994.
10. O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Extended results for minimum-adder constant integer multipliers," IEEE Int. Symp. Circuits Syst., Phoenix, AZ, May 26-29, 2002, vol. 1, pp. 73-76.
11. E. Lawler, Combinatorial Optimization: Networks and Matriods, Dover Publications, 2001.
12. D. Du (ed.), Advances in Steiner Trees, Kluwer, 2000.
13. M. R. Garey and D. S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness, W. H. Freeman and Co., 1979.
14. C. C. Ribeiro and M. C. Souze, "Variable neighborhood search for the degree-constrained minimum spanning tree problem," Discrete Appl. Mathematics, vol. 118, no. 1-2, pp. 43-54, Sept. 2002.
15. D. Onem and C. F. Bazlamacci, "Minimum weight directed spanning tree problem with degree, hop and capacity constraints," Proc. Int. Symp. Computer and Information Sciences, Antalya, Turkey, Nov. 5-7, 2001, pp. 429-436.