Design space optimization of embedded memory systems via data remapping

Joint COnference on Languages, Compilers and Tools for Embedded Systems and Software and Compilers for Embedded Systems

Volumn , Issue , 2002, Pages 28-37

  Palem, Krishna V ^a   Rabbah, Rodric M ^a   Mooney III, Vincent J ^a   Korkmaz, Pinar ^a   Puttaswamy, Kiran ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Data remapping; Design space exploration; Power aware

Indexed keywords

ALGORITHMS; BUFFER STORAGE; DATA STORAGE EQUIPMENT; ENERGY UTILIZATION;

DATA REMAPPING;

EMBEDDED SYSTEMS;

EID: 0036974895     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/566225.513836     Document Type: Conference Paper

References (29)

1. T. Ball and J. Larus. Efficient path profiling. In Proceedings of the 29th Annual International Symposium on Microarchitecture, Dec. 1996.
2. H. M. C. Kulkarni, F. Catthoor. Advanced data layout organization for multi-media applications. In Proceedings of the Workshop on Parallel and Distributed Computing in Image Processing, Video Processing, and Multimedia, May 2000.
3. B. Calder, C. Krintz, S. John, and T. Austin. Cache-conscious data placement. In Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 139-149, Oct. 1998.
4. J. Carter, W. Hsieh, M. Swanson, L. Zhang, A. Davis, M. Parker, L. Schaelicke, L. Stoller, and T. Tateyama. Memory system support for irregular applications. In Workshop on Languages, Compilers, and Runtime Systems for Scalable Computers, May 1998.
5. F. Catthoor, S. Wuytack, E. DeGreef, F. Balasa, L. Nachtergaele, and A. Vandecappelle. Custom Memory Management Methodology. Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer Academic Publishers, 1998.
6. L. Chakrapani, P. Korkmaz, V. Mooney, K. Palem, K. Puttaswamy, and W. Wong. The emerging power crisis in embedded processors: What can a poor compiler do? In Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pages 176-180, Nov. 2001.
7. L. Chakrapani, K. Palem, and W. Wong. TRICEPS: Enhancing the TRIMARAN compiler infrastructure for strongARM code generation. Technical Report CREST-TR-01-001, Georgia Institute of Technology, May 2001.
8. T. Chilimbi, B. Davidson, and J. Larus. Cache-conscious structure definition. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 13-24, May 1999.
9. T. Chilimbi, M. Hill, and J. Larus. Cache-conscious structure layout. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 1-12, May 1999.
10. C. Ding and K. Kennedy. Improving cache performance of dynamic applications with computation and data layout transformations. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 229-241, May 1999.
11. DATA-INTENSIVE SYSTEMS benchmark suite. www.aaec.com/projectweb/dis/.
12. M. Kamble and K. Ghose. Analytical energy dissipation models for low power caches. In Proceedings of the International Symposium on Low Power Electronics and Design, pages 143-148, Aug. 1997.
13. T. Kistler and M. Franz. Automated data-member layout of heap objects to improve memory-hierarchy performance. ACM Transactions on Programming Languages and Systems, 22(3):490-505, May 2000.
14. P. Korkmaz, K. Puttaswamy, and V. Mooney. Energy modeling of a processor core using synopsys and of the memory hierarchy using the kamble and ghose model. Technical Report CREST-TR-02-002, Georgia Institute of Technology, Feb. 2002.
15. M. Lam, E. Rothberg, and M. Wolf. The cache performance of blocked algorithms. In Proceedings of the Fourth International Conference in Architectural Support for Programming Languages and Operations Systems, pages 63-74, Apr. 1991.
16. OLDEN benchmark suite. www.cs.princeton.edu/mcc/olden.html.
17. K. Palem and R. Rabbah. Data remapping for design space optimization of embedded cache systems. Technical Report GIT-CC-02-10, Georgia Institute of Technology, Mar. 2002.
18. P. Panda, F. Catthoor, N. Dutt, K. Danckaert, E. Brock-meyer, C. Kulkrani, A. Vandercappelle, and P. Kjeldsberg. Data and memory optimization techniques for embedded systems. ACM Transactions on Design Automation of Electronic Systems, 6(2): 149-206, Apr. 2001.
19. P. Panda, N. Dutt, and A. Nicolau. Memory data organization for improved cache performance in embedded processor applications. ACM Transactions on Design Automation of Electronic Systems, 2(4):384-409,1997.
20. P. Panda, N. Dutt, and A. Nicolau. Memory Issues In Embedded Systems-On-Chip, Optimizations and Exploration. Kluwer Academic Publishers, 1999.
21. P. Panda, N. Dutt, and A. Nicolau. On-chip vs. off-chip memory: The data partitioning problem in embedded processor-based systems. ACM Transactions on Design Automation of Electronic Systems, 5(3):682-704, July 2000.
22. E. Petrank and D. Rawitz. The hardness of cache conscious data placement. In Proceedings of the 29th Annual ACM Symposium on Principles of Programming Languages, Jan. 2002.
23. STANDARD PERFORMANCE EVALUATION CORPORATION CPU2000 benchmark suite. www.spec.org.
24. B. Steensgaard. Points-to analysis in almost linear time. In Proceedings of the 23rd ACM Symposium on Principles of Programming Languages, pages 32-41, Jan. 1996.
25. The simplescalar-ARM power modeling project. www.eecs.umich.edu/̃jringenb/power/.
26. S. Thompson, P. Packan, and M. Bohr. Mos scaling: Transistor challenges for the 21st century. Technical Report Q3, Intel Technology Journal, July 1994.
27. TRICEPS: A TRIMARAN-based ARM code generator. www.trimaran.org/triceps.shtml.
28. D. Truong, F. Bodin, and A. Seznec. Improving cache behavior of dynamically allocated data structures. In International Conference on Parallel Architectures and Compilation Techniques, pages 322-329, Oct. 1998.
29. S. Wilton and N. Jouppi. An enhanced access and cycle time model for on-chip caches. Technical Report 93.5, WRL Research Report, July 1994.