Improving cache behavior of dynamically allocated data structures

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 1998, Pages 322-329

  Truong, Dan N ^a   Bodin, Francois ^a   Seznec, Andre ^a  

^a CAMPUS DE BEAULIEU   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COSINE TRANSFORMS; DATA STRUCTURES; MEMORY ARCHITECTURE; PARALLEL ARCHITECTURES;

CACHE BEHAVIOR; CODE TRANSFORMATION; DATA LOCALITY; HETEROGENEOUS DATA; LOOP BLOCKING; PERFORMANCE TUNING; POOR PERFORMANCE; SCIENTIFIC APPLICATIONS;

APPLICATION PROGRAMS;

EID: 85006879958     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.1998.727268     Document Type: Conference Paper

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