Incorporating the controller effects during register transfer level synthesis

Proceedings of the European Design and Test Conference

Volumn , Issue , 1994, Pages 308-313

  Ramachandran, Champaka ^a   Kurdahi, Fadi J ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL SYSTEMS; CRITICAL PATH ANALYSIS; ELECTRIC NETWORK SYNTHESIS; HIGH LEVEL LANGUAGES; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; LOGIC DESIGN; MICROPROCESSOR CHIPS; MINIMIZATION OF SWITCHING NETS; SHIFT REGISTERS; STATE ASSIGNMENT; VLSI CIRCUITS;

CONTROLLER EFFECTS; HIGH LEVEL SYNTHESIS; REGISTER TRANSFER LEVEL SYNTHESIS; STATE DIAGRAMS;

DIGITAL CIRCUITS;

EID: 0028134609     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)