RTL synthesis with physical and controller information

Proceedings of European Design and Test Conference

Volumn , Issue , 1997, Pages 299-303

  Xu, Min ^a   Kurdahi, Fadi J ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; MICROPROCESSOR CHIPS;

REGISTER TRANSFER LEVEL (RTL) SYNTHESIS;

SHIFT REGISTERS;

EID: 0030697647     PISSN: 10661409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)