Mass-productive ultra-low temperature ALD SiO2 process promising for sub-90 nm memory and logic devices

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 229-232

  Park, Jae Eun ^a   Ku, Ja Hum ^a   Lee, Joo Won ^a   Yang, Jong Ho ^a   Chu, Kang Soo ^a   Lee, Seung Hwan ^a   Park, Moon Han ^a   Lee, Nae In ^a   Kang, Ho Kyu ^a   Suh, Kwang Pyuk ^a   Cho, Byoung Ha ^b   Kim, Byoung Chul ^b   Shin, Cheol Ho ^b  

^a SAMSUNG Electronics   (South Korea)

^b Moohan Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CATALYSTS; DYNAMIC RANDOM ACCESS STORAGE; LOGIC DEVICES; OXIDATION; POLYSILICON; SILICA;

ATOMIC LAYER DEPOSITION (ALD);

SEMICONDUCTOR STORAGE;

EID: 0036927326     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. S. Choi et. al., "Highly manufacturable Sub-100nm DRAM integrated with full functionality," 2002 Symp. of VLSI Tech., p54, 2002
2. 2 using catalyzed and uncatalyzed self-limiting surface reactions," Surface Review & Lett., 6, p435, 1999
3. 2 at room temperature with the use of catalyzed sequential half-reactions," Science, 278, p1934, 1997