메뉴 건너뛰기




Volumn 37, Issue 12, 2002, Pages 1768-1780

OC-192 transmitter and receiver in standard 0.18-μm CMOS

Author keywords

Clock and data recovery (CDR); Clock multiplier unit (CMU); CMOS; Demultiplexer (DEMUX); Deserializer; Integrated circuits; Jitter generation; Jitter tolerance; Jitter transfer; Multiplexer (MUX); OC 192; Phase locked loops (PLL); Serializer; SONET; Transceiver

Indexed keywords

BANDWIDTH; DATA COMMUNICATION SYSTEMS; DEMULTIPLEXING; JITTER; PHASE LOCKED LOOPS; TRANSMITTERS; TRANSPONDERS; VARIABLE FREQUENCY OSCILLATORS;

EID: 0036917747     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.804336     Document Type: Conference Paper
Times cited : (104)

References (20)
  • 1
    • 0006219588 scopus 로고    scopus 로고
    • 300 pin multi source agreement for 10 gigabit transponders (serdes transceivers)
    • Apr.
    • "300 pin multi source agreement for 10 gigabit transponders (serdes transceivers)," in 10 Giga MSA Consortium, Apr. 2001.
    • (2001) 10 Giga MSA Consortium
  • 3
    • 0012156481 scopus 로고    scopus 로고
    • SONET OC-192, Bellcore, GR-1377-CORE no. 4, Mar.
    • SONET OC-192, "Transport system generic criteria," Bellcore, GR-1377-CORE no. 4, Mar. 1998.
    • (1998) Transport system generic criteria
  • 6
    • 0035054818 scopus 로고    scopus 로고
    • A 10 Gb/s CMOS clock and data recovery circuit with frequency detection
    • Feb.
    • J. Savoj and B. Razavi, A 10 Gb/s CMOS clock data recovery circuit with frequency detection, " in ISSCC 2001 Dig. Tech. Papers, Feb. 2001, pp. 78-79.
    • (2001) ISSCC 2001 Dig. Tech. Papers , pp. 78-79
    • Savoj, J.1    Razavi, B.2
  • 8
    • 0026996358 scopus 로고
    • A 155-MHz clock recovery delay-and phase-locked loop
    • Dec.
    • T.H. Lee and J.F. Bulzacchelli, "A 155-MHz clock recovery delay-and phase-locked loop," IEEE J. Solid-State Circuits, vol. 27, pp. 1736-1746, Dec. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1736-1746
    • Lee, T.H.1    Bulzacchelli, J.F.2
  • 10
    • 0016565959 scopus 로고
    • Clock recovery from random binary signals
    • Oct.
    • J.J.D.H. Alexander, "Clock recovery from random binary signals," Electron.. Lett., vol. 11, pp. 541-542, Oct. 1975.
    • (1975) Electron.. Lett. , vol.11 , pp. 541-542
    • Alexander, J.J.D.H.1
  • 12
    • 0004097131 scopus 로고    scopus 로고
    • IEEE standard for low-voltage differential signals (LVDS) for scalable coherent interface (SCI)
    • Mar.
    • IEEE Standard for low-voltage differential signals (LVDS) for scalable coherent interface (SCI), IEEE Std. 1596.3-1996, Mar. 1996.
    • (1996) IEEE Std. 1596.3 - 1996
  • 13
    • 84938174380 scopus 로고
    • A simple model of feedback osciliator noise spectrum
    • Feb.
    • D.B. Leeson, "A simple model of feedback osciliator noise spectrum," Proc. IEEE, pp. 329-330, Feb. 1966.
    • (1966) Proc. IEEE , pp. 329-330
    • Leeson, D.B.1
  • 14
  • 15
    • 0032635507 scopus 로고    scopus 로고
    • Design issues in CMOS differential LC oscillators
    • May
    • A. Hajimiri and T.H. Lee, "Design issues in CMOS differential LC oscillators," IEEE J. Solid-State Circuits, vol. 34, pp. 717-724, May 1999.
    • (1999) IEEE J. Solid-State Circuits , vol.34 , pp. 717-724
    • Hajimiri, A.1    Lee, T.H.2
  • 16
    • 0032002580 scopus 로고    scopus 로고
    • A general theory of phase noise in electrical oscillators
    • Oct.
    • _, "A general theory of phase noise in electrical oscillators," IEEE J. Solid-State Circuits, vol. 33, pp. 1218-1223, Oct. 1998.
    • (1998) IEEE J. Solid-State Circuits , vol.33 , pp. 1218-1223
  • 17
    • 0035054908 scopus 로고    scopus 로고
    • A 2.75 Gb/s CMOS clock recovery circuit with broad capture range
    • Feb.
    • S.B. Anand and B. Razavi, "A 2.75Gb/s CMOS clock recovery circuit with broad capture range," in ISSCC 2001 Dig. Tech. Papers, Feb. 2001, pp. 78-79.
    • (2001) ISSCC 2001 Dig. Tech. Papers , pp. 78-79
    • Anand, S.B.1    Razavi, B.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.