Single-electron parametron memory cell

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 20, Issue 6, 2002, Pages 2806-2809

  Emiroglu, E G ^a   Durrani, Z A K ^a   Hasko, D G ^a   Williams, D A ^b  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b HITACHI CAMBRIDGE LABORATORY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC VARIABLES MEASUREMENT; ELECTROMETERS; ELECTRON BEAM LITHOGRAPHY; HYSTERESIS; REACTIVE ION ETCHING; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY; TEMPERATURE MEASUREMENT; TUNNEL JUNCTIONS;

CELL POLARIZATION; GATE BIAS VOLTAGE; SINGLE ELECTRON PARAMETRON MEMORY CELL;

ELECTROLYTIC CELLS;

EID: 0036883160     PISSN: 0734211X     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1524975     Document Type: Article

References (8)

1. A. N. Korotkov and K. K. Likharev, J. Appl. Phys. 84, 6114 (1998).
2. R. A. Smith and H. Ahmed, Appl. Phys. Lett. 71, 3838 (1997).
3. N. J. Stone and H. Ahmed, Appl. Phys. Lett. 77, 744 (2000).
4. A. C. Irvine, Z. A. K. Durrani, and H. Ahmed, J. Appl. Phys. 87, 8594 (2000).
5. N. J. Stone, H. Ahmed, and K. Nakazato, IEEE Electron Device Lett. 20, 583 (2000).
6. N. J. Stone and H. Ahmed, Electron. Lett. 35, 1 (1999).
7. T. Altebaeumer and H. Ahmed, J. Appl. Phys. 40, 80 (2001).
8. K. K. Likharev, Proc. IEEE 87, 606 (1999).