An FPGA implementation of a flexible architecture for H.263 Video coding

IEEE Transactions on Consumer Electronics

Volumn 48, Issue 4, 2002, Pages 1056-1066

  Garrido, Matías J ^a   Sanz, César ^a   Jiménez, Marcos ^a   Menasses, Juan M ^a  

^a UNIVERSIDAD POLITÉCNICA DE MADRID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COSINE TRANSFORMS; FIELD PROGRAMMABLE GATE ARRAYS; MOTION COMPENSATION; MOTION ESTIMATION; REDUCED INSTRUCTION SET COMPUTING;

DIGITAL TECHNOLOGIES;

IMAGE CODING;

EID: 0036878097     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2003.1196439     Document Type: Article

References (20)

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