Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated Circuit

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn Part F5373300, Issue , 2000, Pages 105-113

  Herrmann, Klaus ^a   Moch, Sören ^a   Hilgenstock, Jörg ^a   Pirsch, Peter ^a  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER GRAPHICS; IMAGE CODING; INTEGRATED CIRCUITS; MOTION PICTURE EXPERTS GROUP STANDARDS; MULTIMEDIA SYSTEMS; MULTIPROCESSING SYSTEMS; VIDEO SIGNAL PROCESSING; COMPUTER ARCHITECTURE; DYNAMIC RANDOM ACCESS STORAGE; EMBEDDED SYSTEMS; LSI CIRCUITS; REDUNDANCY;

APPLICATION FIELDS; CODING SYSTEM; DATA OUTPUT; DIGITAL VIDEO INTERFACES; EMBEDDED DRAM; INTERNATIONAL STANDARDS; MULTI PROCESSOR SYSTEMS; PROCESSOR NODES; SIGNAL PROCESSOR; VIDEO SIGNAL;

TIMING CIRCUITS; MULTIPROCESSING SYSTEMS;

LARGE AREA INTEGRATED CIRCUITS (LAIC); NODES;

EID: 0034503005     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFTVS.2000.887148     Document Type: Conference Paper

References (10)

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