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Volumn 24, Issue 5, 2002, Pages 391-397

A DSP architecture for high-speed FFT in OFDM systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DATA PROCESSING; FAST FOURIER TRANSFORMS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING;

EID: 0036773050     PISSN: 12256463     EISSN: None     Source Type: Journal    
DOI: 10.4218/etrij.02.0102.0007     Document Type: Article
Times cited : (14)

References (17)
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    • Programmable implementations of xDSL tranisceiver system
    • May
    • B.R. Wiese and J.S. Chow, "Programmable Implementations of xDSL Tranisceiver System," IEEE Comm. Mag., vol. 39, May 2000, pp. 114-119.
    • (2000) IEEE Comm. Mag. , vol.39 , pp. 114-119
    • Wiese, B.R.1    Chow, J.S.2
  • 5
    • 0003884933 scopus 로고    scopus 로고
    • Infineon Technologies Inc.
    • CARMEL DSP Core Data Sheet, Infineon Technologies Inc., 1999.
    • (1999) CARMEL DSP Core Data Sheet
  • 6
    • 85035149096 scopus 로고    scopus 로고
    • Philips semiconductors' R.E.A.L. DSP core for low-cost low-power telecommunication and consumer applications
    • Sept., Online
    • Philips Semiconductors Inc. "Philips Semiconductors' R.E.A.L. DSP Core for Low-Cost Low-Power Telecommunication and Consumer Applications," Technical Backgrounder From Philips Semiconductors, Sept. 1998, [Online] Available: http://www.us3.semiconductors.com.
    • (1998) Technical Backgrounder From Philips Semiconductors
  • 7
    • 0003553025 scopus 로고    scopus 로고
    • Texas Instruments Inc., Dallas, TX
    • TMS320C62xx User's Manual, Texas Instruments Inc., Dallas, TX, 1997.
    • (1997) TMS320C62xx User's Manual
  • 8
    • 0003439556 scopus 로고    scopus 로고
    • Motorola Semiconductors Inc., Denver, CO
    • SC140 DSP Core Reference Manual, Motorola Semiconductors Inc., Denver, CO, 2000.
    • (2000) SC140 DSP Core Reference Manual
  • 10
    • 0003296645 scopus 로고    scopus 로고
    • Multiple and parallel execution units in digital signal processors
    • Online
    • O.B. Sheva, W. Gideon, and B. Eran, "Multiple and Parallel Execution Units in Digital Signal Processors," Smart Cores Articles, 1999, [Online] Available: http://www.dspg.com.
    • (1999) Smart Cores Articles
    • Sheva, O.B.1    Gideon, W.2    Eran, B.3
  • 15
    • 0029205177 scopus 로고
    • New structures for complex multipliers and their noise analysis
    • Apr.
    • A. Wenzler and E. Luder, "New Structures for Complex Multipliers and Their Noise Analysis," Proc. IEEE Int 7 Symp. Circuits and Syst., Apr. 1995, pp. 1432-1435.
    • (1995) Proc. IEEE Int 7 Symp. Circuits and Syst. , pp. 1432-1435
    • Wenzler, A.1    Luder, E.2
  • 16
    • 0031375834 scopus 로고    scopus 로고
    • High-speed array multipliers based on on-the-fly conversion
    • Dec.
    • Sangman Moh and Sukhan Yoon, "High-Speed Array Multipliers Based on On-the-Fly Conversion," ETRI J., vol. 19, no. 4, Dec. 1997, pp. 317-325.
    • (1997) ETRI J. , vol.19 , Issue.4 , pp. 317-325
    • Moh, S.1    Yoon, S.2
  • 17
    • 0034500318 scopus 로고    scopus 로고
    • On-chip multiprocessor with simultaneous multithreading
    • Dec.
    • Kyoung Park, Sunghoon Choi, Yongwha Chung, Woojong Hahn, and Sukhan Yoon, "On-Chip Multiprocessor with Simultaneous Multithreading," ETRI J., vol. 22, no. 4, Dec. 2000, pp. 13-24.
    • (2000) ETRI J. , vol.22 , Issue.4 , pp. 13-24
    • Park, K.1    Choi, S.2    Chung, Y.3    Hahn, W.4    Yoon, S.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.