Fast ASIP synthesis and power estimation for DSP application

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 2000, Pages 591-600

  Cousin, J G ^a   Denoual, M ^b   Saille D ^b   Sentieys, O ^b  

^a INSA DE RENNES   (France)

^b UNIVERSITÉ DE RENNES 1   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CONSTRAINT THEORY; DIGITAL SIGNAL PROCESSING; ELECTRIC POWER SUPPLIES TO APPARATUS; EMBEDDED SYSTEMS; ESTIMATION; MATHEMATICAL MODELS;

APPLICATION SPECIFIC INSTRUCTION SET PROCESSOR; BREIZH SYNTHESIS SYSTEM; HIGH LEVEL SYNTHESIS; MULTI ALGORITHM SYNTHESIS TECHNIQUE; POWER DISSIPATION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0034500769     PISSN: 15206130     EISSN: None     Source Type: Journal    
DOI: 10.1109/SIPS.2000.886757     Document Type: Article

References (13)

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